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MAX14852GWE+T Datasheet(PDF) 6 Page - Maxim Integrated Products |
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MAX14852GWE+T Datasheet(HTML) 6 Page - Maxim Integrated Products |
6 / 22 page Note 2: All devices are 100% production tested at TA = +25°C. Specifications over temperature are guaranteed by design. Note 3: All currents into the device are positive. All currents out of the device are negative. All voltages are referenced to their respective ground (GNDA or GNDB), unless otherwise noted. Note 4: VLDO max indicates voltage capability of the circuit. Power dissipation requirements may limit VLDO max to a lower value. Note 5: ΔVODandΔVOC are the changes in VOD and VOC, respectively, when the TXD input changes state. Note 6: The short circuit output current applies to the peak current just prior to current limiting. Note 7: Not production tested. Guaranteed by design. Note 8: CMTI is the maximum sustainable common-mode voltage slew rate while maintaining the correct output states. CMTI applies to both rising and falling common-mode voltage edges. Tested with the transient generator connected between GNDA and GNDB. VCM = 1kV Note 9: Capacitive load includes test probe and fixture capacitance. Switching Electrical Characteristics (MAX14854) (VDDA – VGNDA = 1.71V to 5.5V, VDDB – VGNDB = 3.0V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VDDA – VGNDA = 3.3V, VDDB – VGNDB = 3.3V, VGNDA = VGNDB, and TA = +25°C.) (Note 7) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC Common Mode Transient Immunity CMTI (Note 8) 35 kV/μs Glitch Rejection TXD, DE, RXD 10 17 29 ns DRIVER Driver Propagation Delay tDPLH, tDPHL RL=54Ω,CL = 50pF, Figure 2 and Figure 3 65 ns Differential Driver Output Skew |tDPLH - tDPHL| tDSKEW RL=54Ω,CL = 50pF, Figure 2 and Figure 3 7 ns Driver Differential Output Rise or Fall Time tLH, tHL RL=54Ω,CL = 50pF, Figure 2 and Figure 3 10 ns Maximum Data Rate DRMAX 25 Mbps Driver Enable to Output High tDZH RL=110Ω,CL = 50pF, Figure 4 80 ns Driver Enable to Output Low tDZL RL=110Ω,CL = 50pF, Figure 5 80 ns Driver Disable Time from Low tDLZ RL=110Ω,CL = 50pF, Figure 5 80 ns Driver Disable Time from High tDHZ RL=110Ω,CL = 50pF, Figure 4 80 ns RECEIVER Receiver Propagation Delay tRPLH, tRPHL CL = 15pF, Figure 6 and Figure 7 (Note 9) 65 ns Receiver Output Skew |tRPLH - tRPHL| tRSKEW CL = 15pF, Figure 6 and Figure 7 (Note 9) 7 ns Maximum Data Rate DRMAX 25 Mbps Receiver Enable to Output High tRZH RL=1kΩ,CL = 15pF, S2 closed, Figure 8 20 ns Receiver Enable to Output Low tRZL RL=1kΩ,CL = 15pF, S1 closed, Figure 8 30 ns Receiver Disable Time From Low tRLZ RL=1kΩ,CL = 15pF, S1 closed, Figure 8 20 ns Receiver Disable Time From High tRHZ RL=1kΩ,CL = 15pF, S2 closed, Figure 8 20 ns www.maximintegrated.com Maxim Integrated │ 6 MAX14852/MAX14854 2.75kVRMS Isolated 500kbps/25Mbps Full-Duplex RS-485/RS-422 Transceivers with ±35kV ESD Protection |
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