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LM83 Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. LM83
Description  Triple-Diode Input and Local Digital Temperature Sensor with Two-Wire Interface
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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LM83 Datasheet(HTML) 6 Page - National Semiconductor (TI)

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Logic Electrical Characteristics (Continued)
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
CC=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80
pF. Boldface limits apply for T
A = TJ = TMIN to TMAX; all other limits TA = TJ = +25˚C, unless otherwise noted.
The switching characteristics of the LM83 fully meet or exceed the published specifications of the SMBus or I
2C bus. The fol-
lowing parameters are the timing relationships between SMBCLK and SMBData signals related to the LM83. They are not the
I
2C or SMBus bus specifications.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 6)
(Note 7)
(Limit)
f
SMB
SMBus Clock Frequency
100
10
kHz (max)
kHz (min)
t
LOW
SMBus Clock Low Time
10 % to 10 %
1.3
25
µs (min)
ms (max)
t
LOWMEXT
Cumulative Clock Low Extend Time
10
ms (max)
t
HIGH
SMBus Clock High Time
90 % to 90%
0.6
µs (min)
t
R,SMB
SMBus Rise Time
10% to 90%
1
µs (max)
t
F,SMB
SMBus Fall Time
90% to 10%
0.3
ns (max)
t
OF
Output Fall Time
C
L = 400 pF,
I
O = 3mA
250
ns (max)
t
TIMEOUT
SMBData and SMBCLK Time Low for
Reset of Serial Interface (Note 12)
25
40
ms (min)
ms (max)
t
1
SMBCLK (Clock) Period
10
µs (min)
t
2,
t
SU;DAT
Data In Setup Time to SMBCLK High
100
ns (min)
t
3,
t
HD;DAT
Data Out Stable after SMBCLK Low
300
TBD
ns (min)
ns (max)
t
4,
t
HD;STA
SMBData Low Setup Time to SMBCLK
Low
100
ns (min)
t
5,
t
SU;STO
SMBData High Delay Time after
SMBCLK High (Stop Condition Setup)
100
ns (min)
t
6,
t
SU;STA
SMBus Start-Condition Setup Time
0.6
µs (min)
t
BUF
SMBus Free Time
1.3
µs (min)
SMBus Communication
DS101058-4
www.national.com
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