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W86L388D Datasheet(PDF) 6 Page - Winbond |
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W86L388D Datasheet(HTML) 6 Page - Winbond |
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W86L388D Preliminary Publication Release Date: August 2001 - 3 - Revision 0.50 4. PIN DESCRIPTIONS Pin Name Type Description SD Interface: 21 SD5 DO/DI SD connection #5 22 SD6 DO/DI SD connection #6 15 SD1 DO/DI SD connection #1 16 SD2 DO/DI SD connection #2 17 SD3 DO SD connection #3 20 SD4 DO SD connection #4 Crystal Driver: 13 XTI DI Clock driver input signal, may be used as external clock input. 14 XTO DO Clock driver output signal. Host Interface Signal: 28 HCKI DI Host clock input. 35 XCSN DI Chip select input pin, active low. 36:38 A[3:1] DI Address input pins. 40 D15/A0 DI/DO Data bus D15 pin, D[15:8] is the high byte of the data bus, D15 also used as A0 when 8-bit CPU data size. In 8-bit mode, internal register high byte (D15:8) will accessed at data bus [7:0] when A0 = 1, low byte (D7:0) will accessed at data bus [7:0] when A0 = 0. 41 D14 DI/DO Data bus D14 pin. 44:48 D[13:9] DI/DO Data bus [13:9] pins. 1:5 D[8:4] DI/DO Data bus [8:4] pins, D[7:0] is the low byte of the data bus. 7:10 D[3:0] DI/DO Data bus [3:0] pins. 33 XWRHN/ XBE0 DI Type 1: High byte (D15 to D8) write control pin, active low. Type 2: High byte (D15 to D8) data valid pin, active low. 34 XWRLN/ XBE1 DI Type 1: Low byte (D7 to D0) write control pin, active low. Type 2: Low byte (D7 to D0) data valid pin, active low. |
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