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C8051F591-IMR Datasheet(PDF) 4 Page - Silicon Laboratories

Part # C8051F591-IMR
Description  This change is considered a minor change which does not affect form, fit, function, quality, or reliability.
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F591-IMR Datasheet(HTML) 4 Page - Silicon Laboratories

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Bulletin #1512071
_____________________________________________________________________________________________________
W7206F2 Silicon Labs Bulletin rev N
The information contained in this document is PROPRIETARY to Silicon Laboratories, Inc. and shall not be reproduced or used in
part or whole without Silicon Laboratories’ written consent. The document is uncontrolled if printed or electronically saved. Pg 6
Change VDD monitor to high threshold and use external supply monitor for systems that require
programming flash in-system
-
Added a section regarding steps to reprogram the VDD monitor high threshold in section 15.1.1
Reprogramming the VDD Monitor High Threshold on page 138.
- Recommendation is to add external supply monitor for systems that require programming flash in-
system on section 15.1.1 Reprogramming the VDD Monitor High Threshold on page 138.
The output of the internal voltage regulator is calibrated by the MCU immediately after any reset event.
The output of the un-calibrated internal regulator could be below the high threshold setting of the VDD
Monitor.
If this is the case and the VDD Monitor is set to the high threshold setting and if the MCU receives a non-
power on reset (POR), the MCU will remain in reset until a POR occurs (i.e., VDD Monitor will keep the
device in reset). A POR will force the VDD Monitor to the low threshold setting which is guaranteed to be
below the un-calibrated output of the internal regulator. The device will then exit reset and resume
normal operation. It is for this reason Silicon Labs strongly recommends that the VDD Monitor is always
left in the low threshold setting (i.e. default value upon POR). When programming the Flash in-system,
the VDD Monitor must be set to the high threshold setting.
To prevent this issue from happening and ensure the highest system reliability, firmware can change the
VDD
Monitor high threshold and use an external supply monitor that meets the Flash VDD requirement listed
in Table 5.5 on page 48. To change the VDD Monitor high threshold, perform the following steps:
1. Disable interrupts.
2. Write 0x01 to the SFRPAGE register.
3. Copy the value from SFR address 0x93 to SFR address 0x94.
4. Return the SFRPAGE register to its previous value.
VDD monitor may trigger on fast VDD changes
– Added a note regarding fast changes on VDD causing the VDD Monitor to trigger to section 17.2 Power-
Fail Reset/VDD Monitor on page 154.
Note: The VDD Monitor may trigger on fast changes in voltage on the VDD pin, regardless of whether the
voltage increased or decreased.
UART TX THRE0 bit may return incorrect status
– Added notes regarding UART TX and RX behavior in section 24.3.1 Data Transmission on page 259,
section 24.3.2 Data Reception on page 259.
Note: THRE0 can have a momentary glitch high when the UART Transmit Holding Register is not empty.
The glitch will occur sometime after SBUF0 was written with the previous byte and does not occur if
THRE0 is checked in the instruction(s) immediately following the write to SBUF0. When firmware writes
SBUF0 and SBUF0 is not empty, TX0 will be stuck low until the next device reset. Firmware should use or
poll on TI0 rather than THRE0 for asynchronous UART writes that may have a random delay in between
transactions.


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