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LM79 Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. LM79
Description  Microprocessor System Hardware Monitor
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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LM79 Datasheet(HTML) 4 Page - National Semiconductor (TI)

 
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Pin Description (Continued)
Pin
Name(s)
Pin
Number
Number
of Pins
Type
Description
Power
Switch
Bypass
16
1
Digital Output
An active low open drain output intended to drive an external P-channel
power MOSFET for software power control.
FAN3–FAN1
17–19
3
Digital Input
0V to +5V amplitude fan tachometer input.
SCL
20
1
Digital Input
Serial Bus Clock.
SDA
21
1
Digital I/O
Serial Bus bidirectional Data.
RESET
22
1
Digital Output
Master Reset, 5 mA driver (open drain), active low output with a 20 ms
minimum pulse width. Available when enabeld via Bit 7 in SMI Mask
Register 2.
VID4/NTEST
23
1
Digital
Input/Test
Output
By default an input for the VID4 power supply readout for the system
processor (Pentium/PRO). Can be programmed as a NAND Tree
totem-pole output that provides board-level connectivity testing. Refer to
Section 11.0 on NAND Tree testing.
GNDA
24
1
GROUND
Internally connected to all analog circuitry. The ground reference for all
analog inputs.
−IN6
25
1
Analog Input
Ground-referred inverting op amp input. Refer to
Section 4.0, “ANALOG
INPUTS”.
FB6
26
1
Analog Output
Output of inverting op amp for Input 6. Refer to
Section 4.0, “ANALOG
INPUTS”.
FB5
27
1
Analog Output
Output of inverting op amp for Input 5. Refer to
Section 4.0, “ANALOG
INPUTS”.
−IN5
28
1
Analog Input
Ground-referred inverting op amp input. Refer to
Section 4.0, “ANALOG
INPUTS”.
IN4–IN0
29–33
5
Analog Input
0V to 4.096V FSR Analog Inputs.
VID3–VID0
34–37
4
Digital Input
Inputs for the power supply readouts for system microprocessor
(Pentium/PRO). This value is read in the VID/Fan Divisor Register.
BTI
38
1
Digital Input
Board Temperature Interrupt driven by O.S. outputs of additional
temperature sensors such as LM75. Provides internal pull-up of 10 k
Ω.
NMI/IRQ
39
1
Digital Output
Non-Maskable Interrupt (open source)/Interrupt Request (open drain).
The mode is selected with Bit 5 of the Configuration Register and the
output is enabled when Bit 2 of the Configuration Register is set to 1.
The default state is disabled and IRQ mode.
SMI
40
1
Digital Output
System Management Interrupt (open drain). This output is enabled when
Bit 1 in the Configuration Register is set to 1. The default state is
disabled.
A2–A0
41–43
3
Digital Input
The three lowest order bits of the 16-bit ISA Address Bus. A0
corresponds to the lowest order bit.
CS
44
1
Digital Input
Chip Select input from an external decoder which decodes high order
address bits on the ISA Address Bus. This is an active low input.
TOTAL PINS
44
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