Data Sheet

HMC6301

Rev. A | Page 7 of 24

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GROUND

AREA

HMC6301

TOP VIEW

(BALL SIDE DOWN)

A

B

C

D

E

F

G

H

1

2

345

6

7

8

9

10

11

12

CLK

SCANOUT

VOUT_QM

VOUT_QP

VOUT_IM

VOUT_IP

RESET

ENABLE

DATA

GND

GND

GND

GND

EXTFIL_P

EXTFIL_N

GND

GND

RFIN

GND

GND

GND

GND

GND

EXTLO_N

EXTLO_P

Figure 2. Pin Configuration Diagram

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

A1

CLK

Serial Digital Interface Clock (1.2 V CMOS).

A2

SCANOUT

Serial Digital Interface Out (1.2 V CMOS).

A3

VOUT_QM

Quadrature Negative Baseband Input. This pin is dc-coupled and matched to 50 Ω.

A4

VOUT_QP

Quadrature Positive Baseband Input. This pin is dc-coupled and matched to 50 Ω.

A5

Power Supply for the Buffer (2.7 V dc).

A6

VOUT_IM

In-Phase Negative Baseband Input. This pin is dc-coupled and matched to 50 Ω.

A7

VOUT_IP

In-Phase Positive Baseband Input. This pin is dc-coupled and matched to 50 Ω.

A8

RESET

Serial Digital Interface Reset (1.2 V CMOS).

A9 to A12, B10 to B12

Power Supply for the Divider (2.7 V dc).

B1

ENABLE

Serial Digital Interface Enable (1.2 V CMOS).

B2

DATA

Serial Digital Interface Data (1.2 V CMOS).

B3, B4, B6, B7, C1, D1, F1,

G2, G4, H1, H5

GND

Analog Ground Connect.

B5

Power Supply for the Digital Circuits (1.3 V dc).

B8

EXTFIL_P

External PLL Loop Filter (Positive).

B9

EXTFIL_N

External PLL Loop Filter (Negative).