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AD7403BRIZ-RL7 Datasheet(PDF) 22 Page - Analog Devices |
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AD7403BRIZ-RL7 Datasheet(HTML) 22 Page - Analog Devices |
22 / 25 page Data Sheet AD7403 Rev. B | Page 21 of 24 INTERFACING TO ADSP-CM4xx The ADSP-CM4xx family of mixed-signal control processors contains on-chip sinc filter and clock generation modules for direct connection to the AD7403 MCLKIN and MDAT pins. The ADSP-CM4xx can process bit streams from four AD7403 devices using a pair of configurable sinc filters for each bit stream. The primary sinc filter of each pair produces the filtered and decimated output for the pair. The output can be decimated to any integer rate between 8 and 256 times lower than the input rate. The four secondary sinc filters are low latency filters with programmable positive and negative overrange detection comparators that can be used to detect system fault conditions Figure 40 shows the typical interface between the AD7403 and the ADSP-CM4xx. Additional information on the configuration of the sinc filter modules in the ADSP-CM4xx can be found in the AN-1265 Application Note. SINC PAIR n PRIMARY SECONDARY LIMIT CONTROL FOR GROUP n MODULATOR CLOCK n ADSP-CM4xx1 AD74031 MDAT MCLKIN SINC0_CLK0 SINC0_D0 1ADDITIONAL PINS OMITTED FOR CLARITY Figure 40. Interfacing the AD7403 to the ADSP-CM4xx POWER SUPPLY CONSIDERATIONS The AD7403 requires a 5 V VDD1 supply, and there are various means of achieving this. One method is to use an isolated dc-to- dc converter such as the ADuM6000. This method provides a 5 V regulated dc supply across the isolation barrier. Note that the inherent isolation of the ADuM6000 is lower than the AD7403. 5V DIGITAL ISOLATION BARRIER VDD1 VDD2 5V ISO Figure 41. ADuM6000 Isolated 5 V DC-to-DC Regulator Example Another method is to regulate a dc supply on the high voltage side of the isolation barrier using a step-down dc-to-dc regulator, such as the ADP2441. VDD2 VDD1 5V DIGITAL 5V 4.5V TO 36V ADP2441 DC-TO-DC SWITCHING REGULATOR ISOLATION BARRIER Figure 42. ADP2441 Step-Down DC-to-DC Regulator Example GROUNDING AND LAYOUT It is recommended to decouple the VDD1 supply with a 10 μF capacitor in parallel with a 1 nF capacitor to GND1. Decouple Pin 1 and Pin 7 individually. Decouple the VDD2 supply with a 100 nF value to GND2. In applications involving high common- mode transients, ensure that board coupling across the isolation barrier is minimized. Furthermore, design the board layout so that any coupling that occurs equally affects all pins on a given component side. Failure to ensure equal coupling can cause voltage differentials between pins to exceed the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. Place any decoupling used as close to the supply pins as possible. Minimize series resistance in the analog inputs to avoid any distortion effects, especially at high temperatures. If possible, equalize the source impedance on each analog input to minimize offset. Check for mismatch and thermocouple effects on the analog input printed circuit board (PCB) tracks to reduce offset drift. INSULATION LIFETIME All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the AD7403. Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. The values shown in Table 9 summarize the peak voltage for 20 years of service life for a bipolar, ac operating condition and the maximum VDE approved working voltages. |
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