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PCM1851PJTR Datasheet(PDF) 2 Page - Burr-Brown (TI) |
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PCM1851PJTR Datasheet(HTML) 2 Page - Burr-Brown (TI) |
2 / 10 page PCM1850 PCM1851 SLES108 − MARCH 2004 www.ti.com 2 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. BLOCK DIAGRAM Single-Ended MUX and PGA BCK VINL1 Reference VREF1 VREF2 Delta-Sigma Modulator Decimation Filter with High-Pass Filter Power Supply AGND VCC VDD DGND Clock and Timing Control Audio Data Interface Control Data Interface LRCK DOUT OVER TEST0 TEST1 RST SCKI VINL2 VINL3 VINL4 VINL5 VINL6 MOUTL Single-Ended MUX and PGA VINR1 Delta-Sigma Modulator VINR2 VINR3 VINR4 VINR5 VINR6 MOUTR VREFS MS (ADR)(1) MD (SDA)(1) MC (SCL)(1) (1) PCM1850 (PCM1851) PIN ASSIGNMENTS PCM1850 (TOP VIEW) 23 22 21 20 19 12 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 VINR2 VINL2 VINR1 VINL1 MOUTL MOUTR RST TEST1 VREFS VREF1 VREF2 Vcc AGND MS MC MD 24 18 34 5 67 8 17 PCM1851 (TOP VIEW) 23 22 21 20 19 12 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 VINR2 VINL2 VINR1 VINL1 MOUTL MOUTR RST TEST1 VREFS VREF1 VREF2 Vcc AGND ADR SCL SDA 24 18 345 67 8 17 |
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