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S6J3128HzC Datasheet(PDF) 2 Page - Cypress Semiconductor |
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S6J3128HzC Datasheet(HTML) 2 Page - Cypress Semiconductor |
2 / 141 page Document Number: 002-04863 Rev.*D Page 2 of 141 S6J3120 Series <CSIO (synchronous serial interface) > Full duplex, double buffering system; 64-byte transmission FIFO, 64-byte reception FIFO Support for SPI. Both master and slave roles are supported. Data length in bits can be set to a value from 5 to 16 or one of the values of 20, 24, and 32. Built-in dedicated baud rate generator (master operation) External clock input is enabled (slave operation). Overrun error detection function is available. DMA transfer is supported. Serial chip select SPI function <LIN-UART (asynchronous serial interface for LIN) > Full duplex, double buffering system; 64-byte transmission FIFO, 64-byte reception FIFO Support for LIN protocol revision 2.1 Both master and slave roles are supported. Framing error and overrun error detection LIN Synch break generation and detection, LIN Synch Delimiter generation Built-in dedicated baud rate generator The external clock can be adjusted by the reload counter. DMA transfer is supported. CAN controller: CAN-FD Max 3 channel CAN-FD (V3.2.0) CAN transfer speed :5Mbps CAN Clock :Max 40MHz 192 message buffers/channel (reception message buffer size) 32 message buffer/channel (transmission message buffer size) Base timer: MAX 30 channels 16bit Timer. It is selectable by 4 functions of the PWM/PPG/PWC/Reload Timer. 2-channel cascade connection enables operation as a 32-bit timer.(PWC and Reload Timer) Reload timer: Max 10 channels 32bit Timer. Free-run timer: Max 6 channels 32bit Timer. Main clock oscillation and CR oscillation are available. Free-run timer output can work in combination with an input capture and an output compare. Input capture: Max 12 channels 32bit Timer. Output compare: Max 12 channels 32bit Timer. Sound generator : Max 3 channels Frequency and amplitude sequencers provided. Stepping motor controller : Max 4 channels 8/10-bit PWM High current output supported (4 lines × 4 channels) Can refer back electromotive force using pin-shared A/D converter LCD controller Common output : 4 , Segment output : 32 Duty drive (SEG0 to SEG31) and static drive (ST0 to ST8) can be switched. Each of COM0 to COM3, SEG0 to SEG31, V0, V1, V2, and V3 pins for duty drive can be switched to the general-purpose port. (The SEG23 to SEG31 pins can be switched to static driving.) V0, V1, V2 and V3 pin can be used as the general-purpose port. But V3 pin cannot be used as an output pin. Each of ST0 to ST8 pins for static drive can be switched to the general-purpose port, or it can be switched to the segment output of duty drive. Quad position & revolution counter(QPRC) : Max 2 channels Real time clock (RTC) (day/hour/minute/second) Main clock oscillation or CR oscillation (100 kHz) can be selected as an operation clock. Calibration: Real time clock (RTC) driven by the CR clock Correction can be done by configuring the prescaler of the real time clock based on the ratio between the main clock and the CR clock. Clock supervisor Abnormality (such as damaged crystal) of the main clock oscillation (4 MHz) can be monitored. The clock can switch to the CR clock when an abnormality is detected. PLL abnormality can be detected. CRC generation Fixed-length CRC • CCITT CRC16 generator polynomial: 0x1021 • IEEE-802.3 CRC32 generator polynomial: 0x04C11DB7 DDR HS-SPI E2PROM and the flash device of the Single/Dual/Quad-SPI protocol can be connected. Watchdog timer Hardware watchdog Software watchdog NMI I/O relocation Peripheral function pin locations can be changed. Low-power consumption control Standby function Power-off function Partial wakeup function Power-on reset Low-voltage detection reset Security Flash security Interface security (JTAG + test port) SHE Unique device ID Package: LEU144 (S6J312xHzC*) *x:A/9/8, z: A/B CMOS 55 nm technology |
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