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PALC22V10D Datasheet(PDF) 2 Page - Cypress Semiconductor

Part No. PALC22V10D
Description  FLASG ERASABLE REPROGRAMMABLE CMOS PAL DEVICE
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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PALC22V10D Datasheet(HTML) 2 Page - Cypress Semiconductor

 
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PALC22V10D
2
Functional Description (continued)
erasedandreprogrammed.Theprogrammablemacrocellprovides
the capability of defining the architecture of each output individu
ally. Each of the 10 potential outputs may be specified as regis
tered" or combinatorial." Polarity of each output may also be in
dividually selected, allowing complete flexibility of output
configuration. Further configurability is provided through array"
configurable output enable" for each potential output. This fea
ture allows the 10 outputs to be reconfigured as inputs on an indi
vidual basis, or alternately used as a combination I/O controlled by
the programmable array.
PALC22V10D features a variable product term architecture.
There are 5 pairs of product term sums beginning at 8 product
terms per output and incrementing by 2 to 16 product terms per
output. By providing this variable structure, the PAL C 22V10D is
optimized to the configurations found in a majority of applications
without creating devices that burden the product term structures
with unusable product terms and lower performance.
Additional features of the Cypress PALC22V10D include a syn
chronous preset and an asynchronous reset product term. These
product terms are common to all macrocells, eliminating the need
todedicatestandardproducttermsforinitializationfunctions.The
device automatically resets upon powerup.
The PALC22V10D, featuring programmable macrocells and vari
able product terms, provides a device with the flexibility to imple
ment logic functions in the 500 to 800gatearray complexity.
Since each of the 10 output pins may be individually configured as
inputs on a temporary or permanent basis, functions requiring up
to 21 inputs and only a single output and down to 12 inputs and 10
outputs are possible. The 10 potential outputs are enabled using
product terms. Any output pin may be permanently selected as an
output or arbitrarily enabled as an output and an input through the
selective use of individual product terms associated with each out
put. Each of these outputs is achieved through an individual pro
grammablemacrocell.Thesemacrocellsareprogrammabletopro
vide a combinatorial or registered inverting or noninverting
output. In a registered mode of operation, the output of the regis
ter is fed back into the array, providing current status information
to the array. This information is available for establishing the next
result in applications such as control state machines. In a combina
torial configuration, the combinatorial output or, if the output is
disabled, the signal present on the I/O pin is made available to the
array.Theflexibilityprovidedbybothprogrammableproductterm
control of the outputs and variable product terms allows a signifi
cant gain in functional density through the use of programmable
logic.
Along with this increase in functional density, the Cypress
PALC22V10D provides lowerpower operation throughtheuseof
CMOS technology, and increased testability with Flash repro
grammability.
Configuration Table
Registered/Combinatorial
C1
C0
Configuration
0
0
Registered/Active LOW
0
1
Registered/Active HIGH
1
0
Combinatorial/Active LOW
1
1
Combinatorial/Active HIGH
Macrocell
OUTPUT
SELECT
MUX
AR
SS
10
Q
Q
D
CP
SP
INPUT/
FEEDBACK
MUX
1
S
MACROCELL
1
C
0
C
V10D 4


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