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PALC22V10D Datasheet(PDF) 1 Page - Cypress Semiconductor

Part No. PALC22V10D
Description  FLASG ERASABLE REPROGRAMMABLE CMOS PAL DEVICE
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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PALC22V10D Datasheet(HTML) 1 Page - Cypress Semiconductor

 
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1
Cypress Semiconductor Corporation
D
3901 North First Street
D San Jose D
CA 95134
D 408-943-2600
July 1991 - Revised October 1995
PALC22V10D
Flash Erasable,
Reprogrammable CMOS PALR Device
For new designs, please refer to the PALCE22V10.
Features
D
Advanced secondgeneration PAL ar
chitecture
D
Low power
90 mA max. commercial (10 ns)
130 mA max. commercial (7.5 ns)
D
CMOS Flash EPROM technology for
electrical erasability and reprogram
mability
D
Variable product terms
2 x(8 through 16) product terms
D
Userprogrammable macrocell
Output polarity control
Individually selectable for regis
tered or combinatorial operation
D
Up to 22 input terms and 10 outputs
D
DIP, LCC, and PLCC available
7.5 ns commercial version
5 ns tCO
5 ns tS
7.5 ns tPD
133MHz state machine
10 ns military and industrial ver
sions
6 ns tCO
6 ns tS
10 ns tPD
110MHz state machine
15ns commercial and military
versions
25ns commercial and military
versions
D
High reliability
Proven Flash EPROM technology
100% programming and functional
testing
Functional Description
The Cypress PALC22V10D is a CMOS
Flash Erasable secondgeneration pro
grammable array logic device. It is im
plemented with the familiar sumofpro
ducts (AND OR) logic structure and the
programmable macrocell.
The PALC22V10D is executed in a 24pin
300mil molded DIP, a 300mil cerDIP, a
28lead square ceramic leadless chip carri
er, a 28lead square plastic leaded chipcar
rier, and provides up to 22 inputs and 10
outputs. The 22V10D can be electrically
Logic Block Diagram (PDIP/CDIP)
Pin Configuration
V10D 1
PLCC
Top View
Macrocell
8
10
12
14
16
16
14
12
10
8
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
16
17
18
19
20
21
22
23
24
Preset
PROGRAMMABLE
AND ARRAY
(132 X 44)
I
I
I
I
I
I
I
I
I
I
CP/I
VSS
I
I/O9
I/O8
I/O 7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
VCC
Reset
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
2
3
4
5
6
7
N/C
V10D 2
PAL is a registered trademark of Advanced Micro Devices.
LCC
Top View
5
6
7
8
9
10
11
43 2
282726
12 13 14 15 1617 18
25
24
23
22
21
20
19
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
2
3
4
5
6
7
1
N/C
V10D 3
NC
NC
25
24
23
22
21
20
19
5
6
7
8
9
10
11
12 13 14 15 16 17 18
43 2
28 27 26
1


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