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PIC12LF1571 Datasheet(PDF) 8 Page - Microchip Technology |
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PIC12LF1571 Datasheet(HTML) 8 Page - Microchip Technology |
8 / 32 page PIC12(L)F1571/2 DS40001713A-page 8 2013 Microchip Technology Inc. REGISTER 3-4: CONFIGURATION WORD 2 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 LVP(1) DEBUG(2) LPBOREN BORV(3) STVREN PLLEN bit 13 bit 8 U-1 U-1 U-1 U-1 U-1 U-1 R/P-1 R/P-1 — — — — — —WRT<1:0> bit 7 bit 0 Legend: R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘1’ ‘0’ = Bit is cleared ‘1’ = Bit is set n = Value when blank or after Bulk Erase bit 13 LVP: Low-Voltage Programming Enable bit(1) 1 = ON - Low-voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE Configuration bit is ignored. 0 = OFF - High Voltage on MCLR/VPP must be used for programming bit 12 DEBUG: Debugger Mode bit(2) 1 = OFF - In-Circuit Debugger disabled; ICSPCLK and ICSPDAT are general purpose I/O pins. 0 = ON - In-Circuit Debugger enabled; ICSPCLK and ICSPDAT are dedicated to the debugger. bit 11 LPBOREN: Low-Power Brown-out Reset Enable bit 1 = OFF - Low-power Brown-out Reset is disabled 0 = ON - Low-power Brown-out Reset is enabled bit 10 BORV: Brown-out Reset Voltage Selection bit(3) 1 = LOW - Brown-out Reset voltage (Vbor), low trip point selected 0 = HIGH - Brown-out Reset voltage (Vbor), high trip point selected bit 9 STVREN: Stack Overflow/Underflow Reset Enable bit 1 = ON - Stack Overflow or Underflow will cause a Reset 0 = OFF - Stack Overflow or Underflow will not cause a Reset bit 8 PLLEN: PLL Enable bit 1 = ON - 4xPLL enabled 0 = OFF - 4xPLL disabled bit 7-2 Unimplemented: Read as ‘1’ bit 1-0 WRT<1:0>: Flash Memory Self-Write Protection bits 2 kW Flash memory: (PIC12F1572): 11 = OFF - Write protection off 10 = BOOT - 000h to 1FFh write-protected, 200h to 7FFh may be modified by PMCON control 01 = HALF - 000h to 3FFh write-protected, 400h to 7FFh may be modified by PMCON control 00 = ALL - 000h to 7FFh write-protected, no addresses may be modified by PMCON control 1 kW Flash memory: (PIC12F1571) 11 = OFF - Write protection off 10 = BOOT - 000h to 0FFh write-protected, 100h to 3FFh may be modified by PMCON control 01 = HALF - 000h to 1FFh write-protected, 200h to 3FFh may be modified by PMCON control 00 = ALL - 000h to 3FFh write-protected, no addresses may be modified by PMCON control Note 1: This bit cannot be programmed to ‘0’ when programming mode is entered via LVP. 2: The DEBUG bit in Configuration Words is managed automatically by device development tools including debuggers and programmers. For normal device operation, this bit should be maintained as a ‘1’. 3: See Vbor parameter for specific trip point voltages. |
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