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AD8556ACPZ-R2 Datasheet(PDF) 8 Page - Analog Devices |
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AD8556ACPZ-R2 Datasheet(HTML) 8 Page - Analog Devices |
8 / 28 page Data Sheet AD8556 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 FILT/DIGOUT 2 DIGIN 3 VNEG 4 VSS 8 VOUT 7 VCLAMP 6 VPOS 5 AD8556 TOP VIEW (Not to Scale) Figure 2. 8-Lead SOIC_N Pin Configuration Table 4. 8-Lead SOIC_N Pin Function Descriptions SOIC_N Mnemonic Description 1 VDD Positive Supply Voltage. 2 FILT/DIGOUT Unbuffered Amplifier Output in Series with a Resistor RF. Adding a capacitor between FILT and VDD or VSS implements a low-pass filtering function. In read mode, this pin functions as a digital output. 3 DIGIN Digital Input. 4 VNEG Negative Amplifier Input (Inverting Input). 5 VPOS Positive Amplifier Input (Noninverting Input). 6 VCLAMP Set Clamp Voltage at Output. 7 VOUT Buffered Amplifier Output. Buffered version of the signal at the FILT/DIGOUT pin. In read mode, VOUT is a buffered digital output. 8 VSS Negative Supply Voltage. Rev. B | Page 7 of 27 |
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