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LM613 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. LM613
Description  Dual Operational Amplifiers, Dual Comparators, and Adjustable Reference
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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LM613 Datasheet(HTML) 5 Page - National Semiconductor (TI)

 
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Electrical Characteristics (Continued)
These specifications apply for V
= GND = 0V, V+ = 5V, V
CM = VOUT = 2.5V, IR = 100 µA, FEEDBACK pin shorted to GND,
unless otherwise specified. Limits in standard typeface are for T
J = 25˚C; limits in boldface type apply over the Operating
Temperature Range.
LM613AM
LM613M
Typical
LM613AI
LM613I
Symbol
Parameter
Conditions
(Note 7)
Limits
LM613C
Units
(Note 8)
Limits
(Note 8)
VOLTAGE REFERENCE
1.2515
1.2689
V (Max)
(±0.6%)(±2%)
Average Temp. Drift
(Note 11)
10
80
150
ppm/˚C
(Max)
Hysteresis
(Note 12)
3.2
µV/˚C
V
R Change
V
R(100 µA) −VR(17 µA)
0.05
1
1
mV (Max)
with Current
0.1
1.1
1.1
mV (Max)
V
R(10 mA) −VR(100 µA)
1.5
5
5
mV (Max)
(Note 13)
2.0
5.5
5.5
mV (Max)
R
Resistance
∆V
R(10→0.1 mA)/9.9 mA
0.2
0.56
0.56
Ω (Max)
∆V
R(100→17 µA)/83 µA
0.6
13
13
Ω (Max)
V
R Change
V
R(Vro = Vr) −VR(Vro = 6.3V)
2.5
7
7
mV (Max)
with High V
RO
(5.06V between Anode and
2.8
10
10
mV (Max)
FEEDBACK)
V
R Change with
V
R(V+ = 5V) −VR(V+ = 36V)
0.1
1.2
1.2
mV (Max)
V
ANODE Change
(V
+ = 32V for LM613C)
0.1
1.3
1.3
mV (Max)
V
R(V+ = 5V) −VR(V+ = 3V)
0.01
1
1
mV (Max)
0.01
1.5
1.5
mV (Max)
I
FB
FEEDBACK Bias
V
ANODE ≤ VFB ≤ 5.06V
22
35
50
nA (Max)
Current
29
40
55
nA (Max)
e
n
V
R Noise
10 Hz to 10 kHz,
30
µV
RMS
V
RO = VR
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the de-
vice beyond its rated operating conditions.
Note 2: Input voltage above V+ is allowed. As long as one input pin voltage remains inside the common-mode range, the comparator will deliver the correct output.
Note 3: More accurately, it is excessive current flow, with resulting excess heating, that limits the voltages on all pins. When any pin is pulled a diode drop below
V, a parasitic NPN transistor turns ON. No latch-up will occur as long as the current through that pin remains below the Maximum Rating. Operation is undefined
and unpredictable when any parasitic diode or transistor is conducting.
Note 4: Simultaneous short-circuit of multiple comparators while using high supply voltages may force junction temperature above maximum, and thus should not
be continuous.
Note 5: Junction temperature may be calculated using TJ = TA +PD θJA. The given thermal resistance is worst-case for packages in sockets in still air. For packages
soldered to copper-clad board with dissipation from one comparator or reference output transistor, nominal
θJA is 90˚C/W for the N package, and 135˚C/W for the
WM package.
Note 6: Human body model, 100 pF discharged through a 1.5 k
Ω resistor.
Note 7: Typical values in standard typeface are for TJ = 25˚C; values in bold face type apply for the full operating temperature range. These values represent the
most likely parametric norm.
Note 8: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold type face).
Note 9: Slew rate is measured with the op amp in a voltage follower configuration. For rising slew rate, the input voltage is driven from 5V to 25V, and the output
voltage transition is sampled at 10V and @ 20V. For falling slew rate, the input voltage is driven from 25V to 5V, and the output voltage transition is sampled at 20V
and 10V.
Note 10: VR is the Cathode-to-feedback voltage, nominally 1.244V.
Note 11: Average reference drift is calculated from the measurement of the reference voltage at 25˚C and at the temperature extremes. The drift, in ppm/˚C, is
106
∆VR/(VR[25˚C]•∆TJ), where ∆VR is the lowest value subtracted from the highest, VR[25˚C] is the value at 25˚C, and ∆TJ is the temperature range. This parameter
is guaranteed by design and sample testing.
Note 12: Hysteresis is the change in VR caused by a change in TJ, after the reference has been “dehysterized”. To dehysterize the reference; that is minimize the
hysteresis to the typical value, its junction temperature should be cycled in the following pattern, spiraling in toward 25˚C: 25˚C, 85˚C, −40˚C, 70˚C, 0˚C, 25˚C.
Note 13: Low contact resistance is required for accurate measurement.
www.national.com
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