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LPC18S30 Datasheet(PDF) 7 Page - NXP Semiconductors |
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LPC18S30 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 151 page LPC18S50_S30_S10 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 — 23 February 2015 7 of 151 NXP Semiconductors LPC18S50/S30/S10 32-bit ARM Cortex-M3 microcontroller 6.2 Pin description On the LPC18S50/S30/S10, digital pins are grouped into 16 ports, named P0 to P9 and PA to PF, with up to 20 pins used per port. Each digital pin can support up to eight different digital functions, including General-Purpose I/O (GPIO), selectable through the System Configuration Unit (SCU) registers. The pin name is not indicative of the GPIO port assigned to it. Not all functions listed in Table 3 are available on all packages. See Table 2 for availability of USB0, USB1, Ethernet, and LCD functions. The parts contain two 10-bit ADCs (ADC0 and ADC1). The input channels of ADC0 and ADC1 on dedicated pins and multiplexed pins are combined in such a way that all channel 0 inputs (named ADC0_0 and ADC1_0) are tied together and connected to both, channel 0 on ADC0 and channel 0 on ADC1, channel 1 inputs (named ADC0_1 and ADC1_1) are tied together and connected to channel 1 on ADC0 and ADC1, and so forth. There are eight ADC channels total for the two ADCs. Fig 5. Pin configuration LQFP144 package LPC18S30/10FBD144 72 37 109 144 aaa-014018 |
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