17

FN8118.3

December 9, 2015

Notes: (4) This parameter is periodically sampled and not 100% tested.

EQUIVALENT A.C. LOAD CIRCUIT

A.C. TEST CONDITIONS

A.C. CHARACTERISTICS (Over recommended operating conditions, unless otherwise specified)

(6) Cb = total capacitance of one bus line in pF.

Symbol

Parameter

Max.

Unit

Test Conditions

Output capacitance (SDA, RESET/RESET)

8

pF

Input capacitance (SCL, WP)

6

pF

5V

4.6k

RESET

100pF

SDA

1533



100pF

5V

Input pulse levels

Input rise and fall times

10ns

Input and output timing levels

Output load

Standard output load

Symbol

Parameter

100kHz

400kHz

Unit

Min.

Max.

Min.

Max.

SCL clock frequency

0

100

0

400

kHz

Pulse width suppression time at inputs

n/a

n/a

50

ns

SCL LOW to SDA data out valid

0.1

0.9

0.1

0.9

µs

Time the bus free before start of new transmission

4.7

1.3

µs

Clock LOW time

4.7

1.3

µs

Clock HIGH time

4.0

0.6

µs

Start condition setup time

4.7

0.6

µs

Start condition hold time

4.0

0.6

µs

Data in setup time

250

100

ns

Data in hold time

5.0

0

µs

Stop condition setup time

0.6

0.6

µs

Data output hold time

50

50

ns

SDA and SCL rise time

1000

300

ns

SDA and SCL fall time

300

300

ns

WP setup time

0.4

0.6

s

WP hold time

0

0

s

Cb

Capacitive load for each bus line

400

400

pF

X4043, X4045