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ISL68201-99125DEMO1Z Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL68201-99125DEMO1Z Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 13 page ISL99125B, ISL99135B 11 FN8848.4 January 24, 2017 Submit Document Feedback other circuits. Best practice is to place the decoupling capacitors on the same PCB side as the device. • Connect GND to the system ground plane with a large via array as close to the GND pins as the design rules allow. This improves thermal and electrical performance. • Place VCC and BOOT-PHASE decoupling capacitors at the IC pins as shown in Figure 20. • Note that the SW plane connecting the ISL99125B, ISL99135B, and inductor must carry a full load current and will create resistive loss if not sized properly. However, it is also a very noisy node that should not be oversized or routed close to any sensitive signals. Best practice is to place the inductor as close to the device as possible and thus, minimizing the required area for the SW connection. If one must choose a long route of either the VOUT side of the inductor or the SW side, choose the quiet VOUT side. Best practice is to locate the ISL99125B, ISL99135B as close to the final load as possible and thus avoid noisy or lossy routes to the load. TABLE 3. AVAILABLE EVALUATION BOARDS EVALUATION BOARDS DESCRIPTION SMBus/ PMBus/I2C ISL68201-99125DEMO1Z 3.3V at 16A design with ISL99125B and the ISL68201 digital hybrid PWM controller. Yes ISL68201-99135DEMO1Z 1.0V at 20A design with ISL99135B and the ISL68201 digital hybrid PWM controller. Yes FIGURE 20. PCB LAYOUT FOR MINIMIZING CURRENT LOOPS 24 23 22 21 20 19 18 17 67 8 9 10 11 12 16 15 14 13 1 2 3 4 5 SW SW SW SW PWM FCCM BOOT GH PHASE GND PAD1 VIN PAD2 |
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