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ISL71091SEH40 Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL71091SEH40 Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 16 page ISL71091SEH40 11 FN8634.2 March 17, 2016 Submit Document Feedback Device Operation Bandgap Precision References The ISL71091SEH40 uses a bandgap architecture and special trimming circuitry to produce a temperature compensated, precision voltage reference with high input voltage capability and moderate output current drive. Applications Information Board Mounting Considerations For applications requiring the highest accuracy, board mounting location should be reviewed. The device uses a ceramic flatpack package. Generally, mild stresses to the die when the Printed Circuit (PC) board is heated and cooled, can slightly change the shape. Because of these die stresses, placing the device in areas subject to slight twisting can cause degradation of reference voltage accuracy. It is normally best to place the device near the edge of a board, or on the shortest side, because the axis of bending is most limited in that location. Mounting the device in a cutout also minimizes flex. Obviously, mounting the device on flexprint or extremely thin PC material will likewise cause loss of reference accuracy. Board Assembly Considerations Some PC board assembly precautions are necessary. Normal output voltage shifts of 100µV to 500µV can be expected with Pb-free reflow profiles or wave solder on multilayer FR4 PC boards. Precautions should be taken to avoid excessive heat or extended exposure to high reflow or wave solder temperatures. Noise Performance and Reduction The output noise voltage in a 0.1Hz to 10Hz bandwidth is typically 6.2µVP-P (VOUT = 4.096V). The noise measurement is made with a bandpass filter. The filter is made of a 1-pole high-pass filter, with a corner frequency at 0.1Hz, and a 2-pole low-pass filter, with a corner frequency (3dB) at 9.9Hz, to create a filter with a 9.9Hz bandwidth. Noise in the 10Hz to 1kHz bandwidth is approximately 6.6µVRMS (VOUT = 4.096V), with 0.1µF capacitance on the output. This noise measurement is made with a 2 decade bandpass filter. The filter is made of a 1-pole high-pass filter with a corner frequency at 10Hz of the center frequency, and 1-pole low-pass filter with a corner frequency at 1kHz. Load capacitance up to 10µF can be added but will result in only marginal improvements in output noise and transient response. Turn-On Time Normal turn-on time is typically 336µs, as shown in Figure 20 on page 9. The circuit designer must take this into account when looking at power-up delays or sequencing. Temperature Coefficient The limits stated for temperature coefficient (Tempco) are governed by the method of measurement. The overwhelming standard for specifying the temperature drift of a reference is to measure the reference voltage at two temperatures. Take the total variation, (VHIGH – VLOW), and divide by the temperature extremes of measurement (THIGH –TLOW). The result is divided by the nominal reference voltage (at T = +25°C) and multiplied by 106 to yield ppm/°C. This is the “Box” method for specifying temperature coefficient. Output Voltage Adjustment The output voltage can be adjusted above and below the factory-calibrated value via the trim terminal. The trim terminal is the negative feedback divider point of the output op amp. The voltage at the trim pin is set at approximately 1.216V by the internal bandgap and amplifier circuitry of the voltage reference. The suggested method to adjust the output is to connect a very high value external resistor directly to the trim terminal and connect the other end to the wiper of a potentiometer that has a much lower total resistance and whose outer terminals connect to VOUT and ground. It is important to minimize the capacitance on the trim terminal to preserve output amplifier stability. It is also best to connect the series resistor directly to the trim terminal, to minimize that capacitance and also to minimize noise injection. Small trim adjustments, such as ±0.25%, will not disturb the factory-set temperature coefficient of the reference, but trimming by large amounts can. Output Stage The output stage of the device has a push-pull configuration with a high side PNP and a low side NPN. This helps the device to act as a source and sink. The device can source 10mA and sink 5mA. Use of COMP Capacitor The reference can be compensated for the COUT capacitors used by adding a capacitor from the COMP pin to GND. See Table 2 for recommended values of the COMP capacitor. Data from SEE testing suggests the best option to use is 1µF for COUT and 1nF for CCOMP. Refer to the SEE report (AN1938) for more details. DNC Pins These pins are for trimming purpose and for factory use only. Do not connect these to the circuit in any way. It will adversely effect the performance of the reference. Simulation Model A SPICE simulation model is available under the Documents tab of the ISL71091SEH40 landing page on the Intersil website. Figures 24 through 29 show a comparison of the characterized part performance and the simulated part performance. TABLE 2. COUT (µF) CCOMP (nF) 0.1 1 11 10 10 |
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