D2-7xx83

6

FN7838.3

April 28, 2016

Submit Document Feedback

ADCVDD Typical ADC Analog Supply

(Voltage)

3.0

3.3

3.6

V

(Current, Active, Power-Down)

-

12

-

mA

CRYSTAL OSCILLATOR

Xo

Crystal Frequency (Fundamental Mode Crystal)

20

24.576

24.822

(24.576 + 1%)

MHz

Dt

Duty Cycle

40

-

60

%

Start-Up Time (Start-Up Time is Oscillator Enabled

(with Valid Supply) to Stable Oscillation)

-5

20

ms

PLL

VCO Frequency

80.00

294.912

297.86

MHz

Input Reference Frequency

20

-

24.822

(24.576 + 1%)

MHz

Feedback Dividers (Integer)

4

12

15

PLL Lock Time from any Input Change

-

2

-

ms

1.8V POWER-ON RESET

Reset Enabled Voltage Level

-

1.1

1.4

V

POR Pulse Width Rejection

-

150

500

(Note 12)

µs

POR Minimum Output Pulse Width

-

5

-

µs

1.8V BROWNOUT DETECTION

Detect Level

1.4

1.5

1.6

V

Pulse Width Rejection

-

100

-

ns

Minimum Output Pulse Width

20

-

-

ns

3.3V BROWNOUT DETECTION

Detect Level

2.5

2.7

2.9

V

Pulse Width Rejection

-

100

-

ns

Minimum Output Pulse Width

20

-

-

ns

ADC PERFORMANCE SPECIFICATIONS

ADCREF DC Level

1.3

1.4

1.5

V

ADCREF Load Current

-

-

±20

µA

ADCREF Source Impedance

-

14

-

kΩ

Analog Input Level

-

V

Dynamic Range

-94-

dB

THD+N

-

-80

-

dB

Gain Mismatch

-0.1

-

dB

Crosstalk

-

-80

-

dB

Power Supply Rejection

-

-70

-

dB

NOTES:

8. All input pins except XTALI.

9. Input leakage applies to all pins except XTALO.

10. Power-down is with device in reset and clocks stopped.

11. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

12. Limits established by characterization and are not production tested.

referenced to ground. PLL at 294.912MHz, OSC at 24.576MHz, core running at 147.456MHz with typical audio data traffic. Minimum supply currents are

measured in full power down configuration. (Continued)

SYMBOL

PARAMETER

TEST

CONDITIONS

MIN

MAX