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PD3537 Datasheet(PDF) 10 Page - OSRAM GmbH |
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PD3537 Datasheet(HTML) 10 Page - OSRAM GmbH |
10 / 14 page PD243X, PD353X, PD443X 2006-01-23 10 Attributes are non-destructive. If a character with bit D7 set is replaced by a cursor (Control Word bit D4 is set, and D3=D2=0) the character will remain in memory and can be revealed again by clearing D4 in the Control Word. Blink (D5): The entire display can be caused to blink at a rate of approximately 2.0 Hz by setting bit D5 in the Control Word. This blink- ing is independent of the state of D7 in all character locations. To synchronize the blink rate in a bank of these devices, it is nec- essary to tie all devices' clocks and resets together as described in a later section of this data sheet. Lamp Test (D6): When the Lamp Test bit is set, all dots in the entire display are lit at half brightness. When this bit is cleared, the display returns to the characters that were showing before the lamp test. Clear Data (D7): When D7 is set (D7=1) in the Control Word, all (dis- play) memory bits are reset to zero and the display goes blank. A second control word must be written into the chip with D7 reset (D7=0) to set up attributes and brightness levels. The SMC-4740 oscillator is designed to drive up to 16 displays with input loading of 15 pF each. The general requirements for cascading 16 displays are: 1.Determine the correct address for each display. 2.Tie CE0 to ground and use CE1 from an address. 3.Select one of the displays to provide the clock for the other displays. 4.Tie CLKSEL to ground on other displays. 5.Use RST to synchronize the blinking between the displays. Cascading Diagram D7 D6 D5 D4 D3 D2 D1 D0 Operation 0 0 0 0 X X B B Disable high- light attribute 0 0 0 1 0 0 B B Display cursor* instead of character 0 0 0 1 0 1 B B Blink single character 0 0 0 1 1 0 B B Display blink- ing cursor* instead of char- acter 0 0 0 1 1 1 B B Alternate char- acter with cur- sor* *“Cursor”= all dots in a single character space lit to half brightness X=Don't care B=Depends on the selected brightness. D7 D6 D5 D4 D3 D2 D1 D0 Operation 0 0 1 X X X B B Blinking display D7 D6 D5 D4 D3 D2 D1 D0 Operation 0 1 0 X X X X X Lamp test D7 D6 D5 D4 D3 D2 D1 D0 Operation 1 0 X X X X X X Clear IDCD5032 WR RD RST CLK CLK Programmable Display CC V D0-D7 A0-A2 CE0 CE1 14 more displays in between I/O SEL CE0 Programmable Display D0-D7 WR A0-A2 RD RST CE1 SEL CLK CLK I/O Data I/O Address Decoder Address Address Decode Chip 1 to 14 A4 A5 A6 WR RD RST |
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