MC145073

MOTOROLA

8

twch

CLK, CLKI

tclk, tclki

twcl

Figure 6.

twsh

SYNC

tsync

Figure 7.

twh

tsclk

twl

tCSC

tCDV

tCSY

VALID DATA

CLK/1

CLK/2

CLK/3

SCLK

SDO

SYNC

Figure 8. Serial Interface Timing (Master Mode: ISLAV = 0)

tsu, th

tCDV

VALID DATA

SCLK

SDO

SYNC

CLK/1

CLK/2

CLK/3

tsclkh

tsclkl

tsu, th

Figure 9. Serial Interface Timing (Slave Mode: ISLAV = 1)

NOTE: CLK signals shown above represent the external clock at three different frequencies.