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IDT71V65603 Datasheet(PDF) 5 Page - Integrated Device Technology

Part # IDT71V65603
Description  3.3V Synchronous ZBT SRAMs
Download  26 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT71V65603 Datasheet(HTML) 5 Page - Integrated Device Technology

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6.42
IDT71V65603, IDT71V65803, 256K x 36, 512K x 18, 3.3V Synchronous SRAMS with
ZBT
™ Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs
Commercial and Industrial Temperature Ranges
5
100 99989796 959493 9291 90
87868584838281
89 88
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
I/O31
I/O30
VDDQ
VSS
I/O29
I/O28
I/O27
I/O26
VSS
VDDQ
I/O25
I/O24
VSS
VDD
I/O23
I/O22
VDDQ
VSS
I/O21
I/O20
I/O19
I/O18
VSS
VDDQ
I/O17
I/O16
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
I/O14
VDDQ
VSS
I/O13
I/O12
I/O11
I/O10
VSS
VDDQ
I/O9
I/O8
VSS
VDD
I/O7
I/O6
VDDQ
VSS
I/O5
I/O4
I/O3
I/O2
VSS
VDDQ
I/O1
I/O0
5304 drw 02
VDD(1)
I/O15
I/OP3
VDD(1)
I/OP4
I/OP1
VDD(1)
I/OP2
ZZ
,
Recommended Operating
Temperature and Supply Voltage
Pin Configuration - 256K x 36
NOTES:
1. Pins 14, 16 and 66 do not have to be connected directly to VDD as long as the input voltage is
≥ VIH.
2. Pin 84 is reserved for a future 16M.
3. DNU=Do not use. Pins 38, 39, 42 and 43 are reserved for respective JTAG pins: TMS, TDI, TDO and TCK. The current die
revision allows these pins to be left unconnected, tied LOW (VSS), or tied HIGH (VDD).
Top View
100 TQFP
Grade
Ambient
Temperature(1)
VSS
VDD
VDDQ
Commercial
0° C to +70° C
0V
3.3V±5%
3.3V±5%
Industrial
-40°C to +85°C
0V
3.3V±5%
3.3V±5%
5304 tbl 05
NOTES:
1. During production testing, the case temperature equals the ambient temperature.


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