MMBT6521LT1G, SMMBT6521LT1G

www.onsemi.com

6

Figure 20. Thermal Response

t, TIME (ms)

1.0

0.01

0.01

0.02

0.03

0.05

0.07

0.1

0.2

0.3

0.5

0.7

0.02

0.05

0.1

0.2

0.5

1.0

2.0

5.0

10

20

50

100

200

500

1.0k 2.0k

5.0k 10k

20k 50k 100k

D = 0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

D CURVES APPLY FOR POWER

PULSE TRAIN SHOWN

FIGURE 21

Figure 21.

-4

0

Figure 22.

400

2.0

DESIGN NOTE: USE OF THERMAL RESPONSE DATA

A train of periodical power pulses can be represented by

the model as shown in Figure 21. Using the model and the de-

vice thermal response the normalized effective transient ther-

mal resistance of Figure 20 was calculated for various duty

cycles.

Example:

The MPS6521 is dissipating 2.0 watts peak under the follow-

ing conditions:

Using Figure 20 at a pulse width of 1.0 ms and D = 0.2, the

reading of r(t) is 0.22.

The peak rise in junction temperature is therefore

For more information, see ON Semiconductor Application

Note AN569/D, available from the Literature Distribution

Center or on our website at www.onsemi.com.

the transistor that must be observed for reliable operation.

Collector load lines for specific circuits must fall below the

limits indicated by the applicable curve.

may be calculated from the data in Figure 20. At high case or

ambient temperatures, thermal limitations will reduce the

power that can be handled to values less than the limitations

imposed by second breakdown.

-2

0

0

+ 20

+ 40

+ 60

+ 80 + 100 + 120 + 140 + 160

AND

CURRENT LIMIT

THERMAL LIMIT

SECOND BREAKDOWN LIMIT

1.0 ms

10

ms

1.0 s

dc

dc

4.0

6.0

10

20

40

60

100

200

4.0

6.0

8.0

10

20

40

100

ms