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DRV8886AT

SLVSDO1 – JANUARY 2017

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Copyright © 2017, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Power supply voltage (VM)

–0.3

40

V

Power supply voltage ramp rate (VM)

0

2

V/µs

Charge pump voltage (VCP, CPH)

–0.3

VM + 7

V

Charge pump negative switching pin (CPL)

–0.3

VM

V

Internal regulator voltage (DVDD)

–0.3

3.8

V

Internal regulator current output (DVDD)

0

1

mA

Internal regulator voltage (AVDD)

–0.3

5.7

V

Control pin voltage (STEP, DIR, ENABLE, nFAULT, M0, M1, DECAY, TRQ, nSLEEP)

–0.3

5.7

V

Open drain output current (nFAULT)

0

10

mA

Current limit input pin voltage (RREF)

–0.3

6.0

V

Continuous phase node pin voltage (AOUT1, AOUT2, BOUT1, BOUT2)

–1.0

VM + 1.0

V

Transient 100 ns phase node pin voltage (AOUT1, AOUT2, BOUT1, BOUT2)

–3.0

VM + 3.0

V

Peak drive current (AOUT1, AOUT2, BOUT1, BOUT2)

0

3

A

–40

150

°C

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

discharge

±2000

V

±500