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74HC390A Datasheet(PDF) 7 Page - Motorola, Inc

Part No. 74HC390A
Description  High–Performance Silicon–Gate CMOS
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

74HC390A Datasheet(HTML) 7 Page - Motorola, Inc

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MC54/74HC390A
High–Speed CMOS Logic Data
DL129 — Rev 6
7
MOTOROLA
APPLICATIONS INFORMATION
Each half of the MC54/74HC390A has independent
÷ 2
and
÷ 5 sections (except for the Reset function). The ÷ 2 and
÷ 5 counters can be connected to give BCD or bi–quinary
(2–5) count sequences. If Output QA is connected to the
Clock B input (Figure 4), a decade divider with BCD output is
obtained. The function table for the BCD count sequence is
given in Table 1.
To obtain a bi–quinary count sequence, the input signals
connected to the Clock B input, and output QD is connected
to the Clock A input (Figure 5). QA provides a 50% duty cycle
output. The bi–quinary count sequence function table is
given in Table 2.
Table 1. BCD Count Sequence*
Count
Output
Count
QD
QC
QB
QA
0
L
L
L
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
L
H
L
H
6
L
H
H
L
7
L
H
H
H
8
H
L
L
L
9
H
L
L
H
* QA connected to Clock B input.
Table 2. Bi–Quinary Count Sequence**
Count
Output
Count
QA
QD
QC
QB
0
L
L
L
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
8
H
L
L
L
9
H
L
L
H
10
H
L
H
L
11
H
L
H
H
12
H
H
L
L
** QD connected to Clock A input.
CONNECTION DIAGRAMS
1, 15
÷ 2
COUNTER
CLOCK A
RESET
Figure 4. BCD Count
Figure 5. Bi-Quinary Count
÷ 2
COUNTER
÷ 5
COUNTER
÷ 5
COUNTER
CLOCK B
CLOCK A
RESET
CLOCK B
1, 15
QA
QB
QC
QD
3, 13
5, 11
6, 10
7, 9
4, 12
2, 14
QA
QB
QC
QD
3, 13
5, 11
6, 10
7, 9
4, 12
2, 14


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