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74HC390A Datasheet(PDF) 5 Page - Motorola, Inc

Part No. 74HC390A
Description  High–Performance Silicon–Gate CMOS
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

74HC390A Datasheet(HTML) 5 Page - Motorola, Inc

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MC54/74HC390A
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
PIN DESCRIPTIONS
INPUTS
Clock A (Pins 1, 15) and Clock B (Pins 4, 15)
Clock A is the clock input to the
÷ 2 counter; Clock B is the
clock input to the
÷ 5 counter. The internal flip–flops are
toggled by high–to–low transitions of the clock input.
CONTROL INPUTS
Reset (Pins 2, 14)
Asynchronous reset. A high at the Reset input prevents
counting, resets the internal flip–flops, and forces QA through
QD low.
OUTPUTS
QA (Pins 3, 13)
Output of the
÷ 2 counter.
QB, QC, QD (Pins 5, 6, 7, 9, 10, 11)
Outputs of the
÷ 5 counter. QD is the most significant bit.
QA is the least significant bit when the counter is connected
for BCD output as in Figure 4. QB is the least significant bit
when the counter is operating in the bi–quinary mode as in
Figure 5.
SWITCHING WAVEFORMS
Q
tr
tf
tPLH
tPHL
tTLH
tTHL
VCC
GND
CLOCK
10%
50%
90%
1/fmax
tw
trec
RESET
Figure 1.
Figure 2.
VCC
GND
VCC
GND
10%
50%
90%
Q
CLOCK
50%
50%
50%
tPHL
tw
10%
TEST CIRCUIT
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3.


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