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MG69L951 Datasheet(PDF) 15 Page - Megawin Technology Co., Ltd |
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MG69L951 Datasheet(HTML) 15 Page - Megawin Technology Co., Ltd |
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15 / 30 page  MEGAWIN MG69L951 Technical Summary 15 Timer1 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 R W 00CAH TM1 T7 T6 T5 T4 T3 T2 T1 T0 00CBH TM1_CTL STC RL/S - - - TKI2 TKI1 TKI0 STC: Start/Stop counting. 1: start and pre-load the value to counter, 0: stop timer clock RL/S: Auto-reload disable/enable. 1: disable auto-reload, 0: enable auto-reload TKI2 TKI1 TKI0 Selected TM1 input frequency 0 0 0 FOSC / 1 0 0 1 FOSC / 4 0 1 0 FOSC / 16 0 1 1 FOSC / 64 1 X X FX32 X: Don’t care. Timer 1 is an 8-bit down-count counter. The counter underflow frequency of timer 1, FTM1_UV, can be calculated with the equation: FTM1_UV = FTM1 / (TM1+1) , where the FTM1 is the timer input frequency set by TKI1 and TKI0. For example: (if FTM1 = 2.000MHz, TKI1=TKI0=0) TM1 Frequency 00H Reserved 01H 1.000MHz 02H 667kHz … … FFH 7.84kHz TM1 (R) TM1 Underflow TM1 TM1_CTL.6 Control Logic TM1_CTL .7 Reload TM1 Reload Buffer (W) TM1_CTL.2 TM1_CTL .0 TM1_CTL.1 /1 /4 /16 /64 FTM1_UV/2 CH2 Tone F OSC F OSC F OSC F OSC F X32 |
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