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GLT5640L32 Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

Part No. GLT5640L32
Description  CMOS Synchronous DRAM 2M x 32 SDRAM
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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GLT5640L32 Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers

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Dec
2003
Rev.0.3
G-Link Technology Corp.
3
G-LINK
ADVANCED
GLT5640L32
CMOS Synchronous DRAM
DESCRIPTION
The G-Link GLT5640L32 is a high speed 67,108,864bits CMOS Synchronous DRAM organized as 4 banks of 524,288 words x
32 bits.
GLT5640L32 is offering fully synchronous operation and is referenced to a positive edge of the clock. All inputs and outputs are
synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All
input and output voltage levels are compatible with LVTTL.
ORDERING INFORMATION
GLT5640L32-5
GLT5640L32 -5.5
GLT5640L32 -6
GLT5640L32 -7
GLT5640L32 -8
GLT5640L32 -10
200MHz
183MHz
166MHz
143MHz
125MHz
100MHz
Normal Power
PART No.
CLOCK Freq.
POWER
LVTTL
86pin
400mil
TSOP-II
INTERFACE
PACKAGE
4 Banks
x 512K bits
x 32
ORGANIZATION
FEATURES
• JEDEC standard 3.3V power supply.
• Auto refresh and self refresh.
• All device pins are compatible with LVTTL interface.
• 4096 refresh cycle / 64ms.
• JEDEC standard 86pin 400mil TSOP-II with 0.5mm of pin
pitch.
• Programmable Burst Length and Burst Type.
- 1, 2, 4, 8 or Full Page for Sequential Burst.
- 4 or 8 for Interleave Burst.
• Programmable CAS Latency : 2,3 clocks.
• All inputs and outputs referenced to the positive edge of
the system clock.
• Data mask function by DQM0,1,2 and 3.
• Internal four banks operation.
• Burst Read Single Write operation.
• Automatic precharge, includes CONCURRENT Auto
Precharge Mode and controlled Precharge


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