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IDT72V36110 Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT72V36110 Datasheet(HTML) 3 Page - Integrated Device Technology |
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3 / 48 page  3 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES IDT72V36100/72V36110 3.3V HIGH DENSITY SUPERSYNC IITM 36-BIT FIFO 65,536 x 36 and 131,072 x 36 PIN CONFIGURATIONS (CONTINUED) PBGA: 1mm pitch, 13mm x 13mm (BB144, BBG144) Order code: BB TOP VIEW ASYW WEN WCLK PAF FF/IR HF BM EF RCLK REN OE Q35 SEN IW PRS LD MRS FS0 FS1 ASYR IP PFM RT Q34 D35 D34 D33 FWFT/SI OW VCC VCC BE PAE RM Q32 Q3 3 D32 D31 D30 VCC VCC GND GND VCC VCC Q29 Q30 Q31 D29 D26 D27 VCC Q26 Q27 Q28 D28 D25 D24 Q23 Q24 Q25 D21 D22 D23 Q22 Q21 Q20 D18 D19 D20 VCC Q19 Q18 Q17 D15 D16 D17 VCC Q16 Q15 Q14 D12 D13 D14 D3 D0 VCC VCC TDO Q2 Q13 Q12 Q11 D10 D6 D4 D1 TMS TCK Q0 Q3 Q5 Q10 Q9 D8 D7 D5 D2 TRST TDI Q1 Q4 Q6 Q7 Q8 A1 BALL PAD CORNER A B C D E F G H J K L M 12 3 4 5 6 7 8 9 10 11 12 6117 drw02b GND GND GND GND GND GND GND GND VCC GND GND GND GND VCC GND GND VCC VCC GND GND GND GND D11 D9 VCC VCC VCC VCC VCC WCLK when WEN is asserted. During Asynchronous operation only the WR inputisusedtowritedataintotheFIFO.DataiswrittenonarisingedgeofWR, theWENinputshouldbetiedtoitsactivestate,(LOW). TheoutputportcanbeselectedaseitheraSynchronous(clocked)interface, or Asynchronous interface. During Synchronous operation the output port is controlledbyaReadClock(RCLK)inputandReadEnable(REN)input. Data is read from the FIFO on every rising edge of RCLK when REN is asserted. DuringAsynchronousoperationonlytheRDinputisusedtoreaddatafromthe FIFO. Data is read on a rising edge of RD, the REN input should be tied to its activestate,LOW.WhenAsynchronousoperationisselectedontheoutputport the FIFO must be configured for Standard IDT mode, and the OE input used toprovidethree-statecontroloftheoutputs,Qn. ThefrequenciesofboththeRCLKandtheWCLKsignalsmayvaryfrom0 tofMAXwithcompleteindependence. Therearenorestrictionsonthefrequency of the one clock input with respect to the other. Therearetwopossibletimingmodesofoperationwiththesedevices:IDT Standard mode and First Word Fall Through (FWFT) mode. InIDTStandardmode,thefirstwordwrittentoanemptyFIFOwillnotappear onthedataoutputlinesunlessaspecificreadoperationisperformed.Aread DESCRIPTION (CONTINUED) |
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