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ADP1046AW Datasheet(PDF) 17 Page - Analog Devices

Part No. ADP1046AW
Description  Digital Controller for Isolated
Download  88 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADP1046AW Datasheet(HTML) 17 Page - Analog Devices

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Data Sheet
ADP1046AW
Rev. 0 | Page 17 of 88
VS2 OPERATION (VS2)
VS2 is used in conjunction with VS1 to control the OrFET gate
drive turn-on. The VS2 sense point on the power rail needs an
external resistor divider to bring the nominal common-mode
signal to 1 V at the VS2 pin (see Figure 17).
The resistor divider is necessary because the VS2 ADC input
range is 0 V to 1.6 V. This divided-down signal is internally fed
into the VS2 ADC. The output of the VS2 ADC goes to the VS2
voltage value register (Register 0x16). The VS2 signal is never used
for the control loop but is used to control the turn-on and turn-off
of the OrFET (see the OrFET Control (GATE Pin) section) as
well as the voltage continuity flag. If the OrFET function of the
ADP1046AW is not used, it is recommended that the VS2 input
be connected directly to PGND. The VS2 value is updated in
Register 0x16 every 10 ms.
VS3 OPERATION (VS3+, VS3−)
VS3± is used for the monitoring and protection of the remote
load voltage. VS3± is a fully differential input that is the main
feedback sense point for the power supply control loop. The
VS3± sense point on the power rail needs an external resistor
divider to bring the nominal common-mode signal to 1 V at
the VS3± pins (see Figure 17). The resistor divider is necessary
because the VS3 ADC input range is 0 V to 1.6 V. This divided-
down signal is internally fed into a high frequency (HF) ADC.
The output of the VS3 ADC goes to the digital filter and is also
updated in Register 0x17 every 10 ms. The HF ADC is also the
high frequency feedback loop for the power supply.
VOLTAGE LINE FEEDFORWARD AND ACSNS
The ADP1046AW supports voltage line feedforward control to
improve line transient performance. The ACSNS value is used
to divide the output of the digital filter, and the result is fed into
the PWM engine. The input voltage signal can be sensed at the
secondary winding of the isolation transformer and must be
filtered by an RCD network to eliminate the voltage spike at the
switch node (see Figure 19).
ACSNS
ADC
0V TO 1.6V
ACSNS
FEEDFORWARD
ADC
0.6V TO 1.6V
PROGRAMMABLE
ACTION (REG 0x0D[3:0])
FEEDFORWARD
GAIN
(REG 0x75[1:0])
DPWM
ENGINE
DIGITAL
FILTER
ACSNS GAIN TRIM
(REG 0x5E)
0.45V
1/x
Vx
R1
R2
FROM
SECONDARY
WINDING
R
Figure 19. Feedforward Configuration
The ACSNS voltage must be set to 1 V when the nominal input
voltage is applied. The ACSNS ADC sampling period is 10 µs;
therefore, the decision to modify the PWM outputs based on
input voltage is performed at this rate.
The feedforward scheme modifies the modulation value based
on the ACSNS voltage. When the ACSNS input is 1 V, the line
feedforward has no effect. For example, if the digital filter output
remains unchanged and the ACSNS voltage changes to 50% of
its original value (still higher than 0.5 V), the modulation of the
falling edge of OUTx doubles and vice versa (see Figure 20). The
voltage line feedforward function is optional and is programmable
using Register 0x75.
ACSNS
DIGITAL
FILTER
OUTPUT
OUTx
tMODULATION
tS
tS
tMODULATION
Figure 20. Feedforward Control on Modulation
The ACSNS level comparator is also connected on the same pin
and flags an ACSNS fault when the voltage on the pin is below
0.45 V within each switching period. The ACSNS level comparator
is used to detect whether the node is switching.
DIGITAL FILTER
The loop response of the power supply can be changed using the
internal programmable digital filter. A Type 3 filter architecture
has been implemented. To tailor the loop response to the specific
application, the low frequency gain, zero location, pole location,
and high frequency gain can all be set individually (see the Digital
Filter Programming Registers section). It is recommended that
the Analog Devices, Inc., software GUI be used to program the
filter. The software GUI displays the filter response in Bode plot
format and can be used to calculate all stability criteria for the
power supply.
From the sensed voltage to the duty cycle, the transfer function
of the filter in z-domain is as follows:
×
+
×
×
=
a
z
b
z
c
z
z
m
d
H(z)
68
.
7
1
24
.
202
where:
a = filter_pole_register_value/256.
b = filter_zero_register_value/256.
c = high_frequency_gain_register_value.
d = low_frequency_gain_register_value.
m = 1 when 48.8 kHz ≤ fSW < 97.7 kHz.
m = 2 when 97.7 kHz ≤ fSW < 195.3 kHz.
m = 4 when 195.3 kHz ≤ fSW < 390.6 kHz.
m = 8 when 390.6 kHz ≤ fSW.
fSW is the switching frequency.


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