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ADP1046AW Datasheet(PDF) 76 Page - Analog Devices

Part No. ADP1046AW
Description  Digital Controller for Isolated
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADP1046AW Datasheet(HTML) 76 Page - Analog Devices

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ADP1046AW
Data Sheet
Rev. 0 | Page 76 of 88
Bits
Bit Name
R/W
Description
2
t3 sign
R/W
0 = positive sign. Increase of balance control modulation moves t3 right.
1 = negative sign. Increase of balance control modulation moves t3 left.
1
Modulate enable, t4
R/W
Setting this bit enables modulation from balance control on the OUTB falling edge, t4. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0
t4 sign
R/W
0 = positive sign. Increase of balance control modulation moves t4 right.
1 = negative sign. Increase of balance control modulation moves t4 left.
Table 111. Register 0x77—Volt-Second Balance Settings (OUTC and OUTD Pins)
Bits
Bit Name
R/W
Description
7
Modulate enable, t5
R/W
Setting this bit enables modulation from balance control on the OUTC rising edge, t5. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
6
t5 sign
R/W
0 = positive sign. Increase of balance control modulation moves t5 right.
1 = negative sign. Increase of balance control modulation moves t5 left.
5
Modulate enable, t6
R/W
Setting this bit enables modulation from balance control on the OUTC falling edge, t6. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
4
t6 sign
R/W
0 = positive sign. Increase of balance control modulation moves t6 right.
1 = negative sign. Increase of balance control modulation moves t6 left.
3
Modulate enable, t7
R/W
Setting this bit enables modulation from balance control on the OUTD rising edge, t7. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
2
t7 sign
R/W
0 = positive sign. Increase of balance control modulation moves t7 right.
1 = negative sign. Increase of balance control modulation moves t7 left.
1
Modulate enable, t8
R/W
Setting this bit enables modulation from balance control on the OUTD falling edge, t8. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0
t8 sign
R/W
0 = positive sign. Increase of balance control modulation moves t8 right.
1 = negative sign. Increase of balance control modulation moves t8 left.
Table 112. Register 0x78—Volt-Second Balance Settings (SR1 and SR2 Pins)
Bits
Bit Name
R/W
Description
7
Modulate enable, t9
R/W
Setting this bit enables modulation from balance control on the SR1 rising edge, t9. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
6
t9 sign
R/W
0 = positive sign. Increase of balance control modulation moves t9 right.
1 = negative sign. Increase of balance control modulation moves t9 left.
5
Modulate enable, t10
R/W
Setting this bit enables modulation from balance control on the SR1 falling edge, t10. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
4
t10 sign
R/W
0 = positive sign. Increase of balance control modulation moves t10 right.
1 = negative sign. Increase of balance control modulation moves t10 left.
3
Modulate enable, t11
R/W
Setting this bit enables modulation from balance control on the SR2 rising edge, t11. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
2
t11 sign
R/W
0 = positive sign. Increase of balance control modulation moves t11 right.
1 = negative sign. Increase of balance control modulation moves t11 left.
1
Modulate enable, t12
R/W
Setting this bit enables modulation from balance control on the SR2 falling edge, t12. It is
recommended that volt-second balance not be enabled on edges that are between 0 ns and
640 ns of the switching period.
0
t12 sign
R/W
0 = positive sign. Increase of balance control modulation moves t12 right.
1 = negative sign. Increase of balance control modulation moves t12 left.


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