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MCP659 Datasheet(PDF) 23 Page - Microchip Technology |
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MCP659 Datasheet(HTML) 23 Page - Microchip Technology |
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23 / 62 page  2009-2014 Microchip Technology Inc. DS20002146D-page 23 MCP651/1S/2/3/4/5/9 When the VCAL pin is left open, the internal resistor divider generates a VCM_INT of approximately VDD/3, which is near the center of the input Common mode voltage range. It is recommended that an external capacitor from VCAL to ground be added to improve noise immunity. When the VCAL pin is driven by an external voltage source, which is within its specified range, the op amp will have its input offset voltage calibrated at that Common mode input voltage. Make sure that VCAL is within its specified range. It is possible to use an external resistor voltage divider to modify VCM_INT; see Figure 4-2. The internal circuitry at the VCAL pin looks like 100 k tied to VDD/3. The parallel equivalent of R1 and R2 should be much smaller than 100 k to minimize differences in matching and temperature drift between the internal and external resistors. Again, make sure that VCAL is within its specified range. FIGURE 4-2: Setting VCM with External Resistors. For instance, a design goal to set VCM_INT =0.1V when VDD = 2.5V could be met with: R1 =24.3 k, R2 =1.00 k and C1 = 100 nF. This will keep VCAL within its range for any VDD, and should be close enough to 0V for ground-based applications. 4.2 Input 4.2.1 PHASE REVERSAL The input devices are designed to not exhibit phase inversion when the input pins exceed the supply voltages. Figure 2-41 shows an input voltage exceeding both supplies with no phase inversion. 4.2.2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-3. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go too far above VDD; their breakdown voltage is high enough to allow normal operation, and low enough to bypass quick ESD events within the specified limits. FIGURE 4-3: Simplified Analog Input ESD Structures. In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the currents (and voltages) at the input pins (see Section 1.1 “Absolute Maximum Ratings †”). Figure 4-4 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN–) from going too far below ground, and the resistors R1 and R2 limit the possible current drawn out of the input pins. Diodes D1 and D2 prevent the input pins (VIN+ and VIN–) from going too far above VDD, and dump any currents onto VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. FIGURE 4-4: Protecting the Analog Inputs. It is also possible to connect the diodes to the left of the resistor R1 and R2. In this case, the currents through the diodes D1 and D2 need to be limited by some other mechanism. The resistors then serve as in-rush current limiters; the DC current into the input pins (VIN+ and VIN–) should be very small. MCP65X R1 R2 VSS VDD VCAL C1 Bond Pad Bond Pad Bond Pad VDD VIN+ VSS Input Stage Bond Pad VIN– V1 MCP65X R1 VDD D1 R1 > VSS – (minimum expected V1) 2mA VOUT R2 > VSS – (minimum expected V2) 2mA V2 R2 D2 |
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Similar Description - MCP659 |
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