Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

TDP158 Datasheet(PDF) 48 Page - Texas Instruments

Click here to check the latest version.
Part No. TDP158
Description  6-Gbps, AC-Coupled to TMDS or HDMI Redriver
Download  55 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo 

TDP158 Datasheet(HTML) 48 Page - Texas Instruments

Zoom Inzoom in Zoom Outzoom out
 48 / 55 page
background image
5 to 10
mils
5 to 10
mils
20 to 40
mils
Layer 1: TMDS signal layer
Layer 2: Ground Plane
Layer 3: Power Plane
Layer 4: Control signal layer
Layer 1: TMDS signal layer
Layer 2: Ground Plane
Layer 3: VCC Power Plane
Layer 6: Control signal layer
Layer 5: Ground Plane
Layer 4: VDD Power Plane
48
TDP158
SLLSEX2 – DECEMBER 2016
www.ti.com
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
11 Layout
11.1 Layout Guidelines
For the TDP158 On a high-K board – It is required to solder the PowerPAD™ onto the thermal land to ground. A
thermal land is the area of solder-tinned-copper underneath the PowerPAD package. On a high-K board the
TDP158 can operate over the full temperature range by soldering the PowerPAD onto the thermal land. On a
low-K board, for the device to operate across the temperature range on a low-K board, a 1-oz Cu trace
connecting the GND pins to the thermal land must be used. A simulation shows RθJA = 100.84°C/W allowing 545
mW power dissipation at 70°C ambient temperature. A general PCB design guide for PowerPAD packages is
provided in the document SLMA002 . TI recommends using at a minimum a four layer stack up to accomplish a
low-EMI PCB design. TI recommends six layers as the TDP158 is a two voltage rail device.
Routing the high-speed TMDS traces on the top layer avoids the use of vias. (and the introduction of their
inductances) and allows for clean interconnects from the HDMI connectors to the Redriver inputs and outputs.
It is important to match the electrical length of these high speed traces to minimize both inter-pair and intra-
pair skew.
Placing a solid ground plane next to the high-speed single layer establishes controlled impedance for
transmission link interconnects and provides an excellent low –inductance path for the return current flow.
Placing a power plane next to the ground plane creates and additional high-frequency bypass capacitance.
Routing slower seed control signals on the bottom layer allows for greater flexibility as these signal links
usually have margin to tolerate discontinuities such as vias.
If an additional supply voltage plane or signal layer is needed, add a second power/ground plane system to
the stack to keep symmetry. This makes the stack mechanically stable and prevents it from warping. Also the
power and ground plane of each power system can be place closer together, thus increasing the high
frequency bypass capacitance significantly.
Figure 50. Recommended 4 – or 6 – Layer PCB Stack


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn