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TDP158 Datasheet(PDF) 45 Page - Texas Instruments |
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TDP158 Datasheet(HTML) 45 Page - Texas Instruments |
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45 / 55 page  HDMI/DVI Receptacle IN_CLKp OUT_CLKp IN_D1p OUT_D1p IN_D0p OUT_D0p OUT_D2n IN_D2p 5V HPD_SNK SDA_SNK SCL_SNK OE VSADJ 0.1 µF 6 .Ÿ 1% ML0p ML1p ML2p ML3p 0 Ÿ 1 0Ÿ 0.1 µF HPD HPD_SRC 2 .Ÿ Optional TMDS_D2p HPD DDC_SDA DDC_SCL IN_D2n 0.1 µF ML0n 0.1 µF 0.1 µF 0.1 µF 0.1 µF 0.1 µF 0.1 µF ML1n ML2n ML3n IN_CLKn IN_D1n IN_D0n 1 7 4 5 6 10 9 2 DDC_SCL DDC_SDA 2 .Ÿ SDA_SRC SCL_SRC OUT_D2p OUT_CLKn OUT_D1n OUT_D0n TMDS_D2n TMDS_D0p TMDS_D0n TMDS_D1p TMDS_D1n TMDS_CLKp TMDS_CLKn 3 36 18 39 38 6 1 3 4 9 7 12 10 16 15 19 11 2 5 8 17 14 15 GND1 GND3 GND6 GND2 GND4 GND5 0.01 µF 20 22 23 21 0 Ÿ 0 Ÿ 0 Ÿ I2C_EN TERM EQ1/A0 EQ2/A1 SLEW 23 16 17 34 8 2 .Ÿ 2 .Ÿ I2C_SCL I2C_SDA SDA_CTL/PRE SCL_CTL/SWAP 14 13 100 .Ÿ CAD_DET 0.1 µF 0.1 µF 10 uF VCC_3.3 V CEC CEC CEC CEC 13 VDD_1.1 V 12 19 20 31 40 GND GND THERMAL PAD 35 CASE_GND1 CASE_GND2 CASE_GND3 CASE_GND4 30 24 27 26 25 21 22 29 32 28 33 VCC_3.3V VCC_3.3 V 0.1 µF 0.1 µF 0.1 µF 10 µF VDD_1.1 V 0.1 µF 0.1 µF 0.1 µF 0 Ÿ 0 Ÿ 0 Ÿ 0 Ÿ NC Populated only when using Pin Strapping Populated only when using I2C DDC_SCL DDC_SDA DDC_SCL DDC_SDA NOTE: Connector side DDC is 5 V while GPU may require 3.3 V DDC so a level shifter may be needed here 11 37 VCC_3.3 V Copyright © 2016, Texas Instruments Incorporated 45 TDP158 www.ti.com SLLSEX2 – DECEMBER 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 9.2.4 Application with DDC Snoop 9.2.4.1 Source Side HDMI Application In source side applications the TDP158 takes an AC coupled HDMI signal and provides signal conditioning and level shifting to support TMDS signaling. Figure 48 provides an example of a DDC snoop version. Notes in both schematics provide important system design considerations. To help reduce overall EMI in a system the VCC and VDD decoupling caps need to be as close to the pins as possible. The drawings shown one set but multiple sets may be needed for each pin. In noisy systems a 4.7-pF capacitor may be added to the decoupling capacitors. Control pins can be tied directly to VCC, GND or left floating. Drawings show 0-Ω resistors as this provides flexibility. In noisy systems a 0.1-µF capacitor to GND may reduce glitches on these pins and are not shown in the drawings. If an application requires completely bypassing the DDC source and sink pins on the TDP158 then connect them to GND as the SCL/SDA_SRC are shown in Figure 48. If this is done the TX termination must be controlled by the TERM pin or through I2C. Figure 48. TDP158 Source Side Application with DDC Snoop |
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