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TDP158 Datasheet(PDF) 42 Page - Texas Instruments

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Part No. TDP158
Description  6-Gbps, AC-Coupled to TMDS or HDMI Redriver
Download  55 Pages
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com

TDP158 Datasheet(HTML) 42 Page - Texas Instruments

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Copyright © 2016, Texas Instruments Incorporated
Typical Application (continued)
9.2.1 Design Requirements
The TDP158 can be designed into many different applications. In all the applications there are certain
requirements for the system to work properly. Two voltage rails are required in order to support lowest power
consumption possible. OE pin must have a 0.1-µF capacitor to ground. This pin can be driven by a processor but
the pin needs to change states after voltage rails have stabilized. The best way to configure the device is by
using I2C but pin strapping is also provided as I2C is not available in all cases. As sources may have many
different naming conventions it is necessary to confirm that the link between the source and the TDP158 are
correctly mapped. A Swap function is provide for the input pins incase signaling if reversed between source and
device. The control pin values below are based upon driving pins with a microcontroller, otherwise, the shown
pull up/down configuration meet device levels. Table below provides information on expected values in order to
perform properly.
For this design, use the parameters shown in Table 27.
Table 27. Design Parameters
Design Parameter
3.3 V
1.1 V
Main Link Input Voltage
VID = 0.15 to 1.4 Vpp
Control Pin Max Voltage for Low
Connect to GND
Control Pin Voltage Range Mid
Connect to GND
Control Pin Min Voltage for High
Connect to VCC
R(VSADJ) Resistor
6 k
Ω 1%
9.2.2 Detailed Design Procedure Source Side
The TDP158 is a signal conditioning device that provides several forms of signal conditioning in order to support
compliance for HDMI or DVI at a source connector. These forms of signal conditioning are accomplished using
receive equalization, retiming, and output driver configurability. The transmitter will drive 1”- 2” of board trace and
connector when compliance is required at the connector.
To design in the TDP158 the following need to be understood for a source side application:
Determine the loss profile between the GPU/chipset and the HDMI/DVI connector.
Based upon this loss profile and signal swing determine optimal location for the TDP158, in order to pass
source electrical compliance. Usually within 1”- 2” of the connector.
Use the typical application Figure 44 for information on control pin resistors.
The TDP158 has a receiver equalizer but can also be configured using EQ1 and EQ2 control pins.
Set the VOD, Pre-emphasis, termination, and edge rate levels appropriately to support compliance by using
the appropriate VSADJ resistor value and setting SDA_CTL/PRE, TERM and SLEW control pins.
The thermal pad must be connected to ground.
See schematics in Figure 44 on recommended decouple caps from VCC pins to Ground.

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