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TDP158 Datasheet(PDF) 21 Page - Texas Instruments

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Part No. TDP158
Description  6-Gbps, AC-Coupled to TMDS or HDMI Redriver
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TDP158 Datasheet(HTML) 21 Page - Texas Instruments

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TDP158
www.ti.com
SLLSEX2 – DECEMBER 2016
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Copyright © 2016, Texas Instruments Incorporated
8 Detailed Description
8.1 Overview
The TDP158 is an AC coupled digital video interface (DVI) or high-definition multimedia interface (HDMI) signal
input to Transition Minimized Differential Signal (TMDS) level shifting Redriver. The TDP158 supports four TMDS
channels, Hot Plug Detect, and a Digital Display Control (DDC) interfaces. The TDP158 supports signaling rates
up to 6 Gbps to allow for the highest resolutions of 4k2k60p 24 bits per pixel and up to WUXGA 16-bit color
depth or 1080p with higher refresh rates. For passing compliance and reducing system level design issues
several features have been included such as TMDS output amplitude adjust using an external resistor on the
VSADJ pin, source termination selection, pre-emphasis and output slew rate control. Device operation and
configuration can be programmed by pin strapping or I2C. Four TDP158s can be used on one I2C bus when
I2C_EN is high with device address set by A0/A1.
To reduce active power the TDP158 supports dual power supply rails of 1.1 V on VDD and 3.3 V on VCC. There
are several methods of power management such as going into power down mode using three methods:
1. HPD is low
2. Writing a 1 to register 09h[3]
3. de-asserting OE.
De-asserting OE clears the I2C registers, thus once re-asserted, the device must be reprogrammed if I2C was
used for device setup. Upon return to normal active operation from re-asserted, OE or re-asserted HPD, and the
TDP158 requires the source to write a 1 to the TMDS_CLOCK_RATIO_STATUS register in order for the TDP158
to resume 75
Ω to 150 Ω source termination. If during the source to sink read, this bit is already set as a one, the
TDP158 automatically sets this bit to 1. The SIG_EN register enables the signal detect circuit that provides an
automatic power-management feature during normal operation. When no valid signal is present on the clock
input, the device enters Standby mode. DDC link supports the HDMI 2.0b SCDC communication, 100 Kbps data
rate default and 400 kbps adjustable by software.
TDP158 supports fixed EQ gain control to compensate for different lengths of input cables or board traces. The
EQ gain can be software adjusted by I2C control or pin strapping EQ1 and EQ2 pins. Customers can use the
TERM to change to one of three source termination impedances for better output performance when working in
HDMI1.4b or HDMI2.0b. When the TMDS_CLOCK_RATIO_STATUS bit is set to 1, the TDP158 automatically
switches in 75
Ω to 150 Ω source termination. To assist in ease of implementation, the TDP158 supports lanes
swapping, see Lane Control. Two temperature gradient versions of the device available extended commercial
temperature range 0ºC to 85ºC (TDP158) and industrial temperature range from –40ºC to 85ºC (TDP158I).


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