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BT860-BT861 Datasheet(PDF) 24 Page - Synaptics Incorporated. |
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BT860-BT861 Datasheet(HTML) 24 Page - Synaptics Incorporated. |
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24 / 111 page  2.0 Inputs and Timing Bt860/861 2.3 Configurations and Timing Multiport YCrCb to NTSC/PAL /SECAM 2-8 Conexant D860DSA Timing mode 2 is the ITU-R BT.601 slave mode. An example connection diagram is illustrated in Figure 2-4. In this example, the source feeding the P port is the timing master, and both the optional OSD source and the Bt860/861 are timing slaves. Although additional sources are shown in these diagrams, it is not necessary to have more than one video source. When the Bt860/861 is configured for ITU-R BT.601 timing, the HSYNC*, VSYNC*, FIELD, and BLANK* pins synchronize the Bt860/861 to external video sources. In master mode, HSYNC* field, and VSYNC* are outputs and the BLANK* pin is not used. All timing is generated internally and blanking is determined by the HBLANK, VBLANK, HACTIVE, and VACTIVE registers. In slave mode, HSYNC*, VSYNC* and BLANK* are inputs and the encoder’s timing is controlled by an external master. Blanking is set either by the internal HBLANK, VBLANK, HACTIVE, and VACTIVE registers (register bit BLK_IGNORE = 1) or by a blanking signal on the BLANK* pin (register bit BLK_IGNORE = 0). Figure 2-4. Timing Mode 2 Connection Example Video Master Bt860/861 Optional OSD Source, Timing Slave P[7:0] HSYNC* VSYNC* CLKIN(1) BLANK* OSD[7:0] ALPHA[1:0] 8 8 2 861_007 NOTE(S): (1) It is not required that the clock is sourced external to the Bt860/861. |
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