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DSP96002 Datasheet(PDF) 3 Page - Motorola, Inc

Part No. DSP96002
Description  32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR
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Maker  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
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DSP96002 Datasheet(HTML) 3 Page - Motorola, Inc

 
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DSP96002
Features
MOTOROLA
DSP96002/DRev. 2
iii
FEATURES
Digital signal processing core
Efficient 32-bit DSP engine
Conforms to IEEE 754-1985 standard for single precision (32-bit) and single
extended precision (44-bit) arithmetic
Up to 30 Million Instructions Per Second (MIPS) at 60 MHz
Parallel operation of Data ALU, Address Generation Unit (AGU), and program
controller within the CPU allow more processing per instruction cycle
Single-cycle 32
× 32 bit parallel multiplier
Highly parallel instruction set with unique DSP addressing modes
Nested hardware DO loops
Instruction cache extended to operate as 4 K byte (1 K word)
Fast auto-return interrupts
Address buses:
One 32-bit unidirectional internal X memory Address Bus (XAB)
One 32-bit unidirectional internal Y memory Address Bus (YAB)
One 32-bit internal Program Address Bus (PAB)
Two 32-bit external address buses
Data buses:
One 32-bit bidirectional internal X memory Data Bus (XDB)
One 32-bit bidirectional internal Y memory Data Bus (YDB)
One 32-bit bidirectional internal Global memory Data Bus (GDB)
One 32-bit bidirectional internal DMA Data Bus (DDB)
One 32-bit bidirectional internal Program Data Bus (PDB)
Two 32-bit external data buses
MCU-like instruction set mnemonics make programming easier
Memory
On-chip 1024
× 32-bit Program RAM
Two independent on-chip 512
× 32-bit data RAMs
Two independent on-chip 512
× 32-bit data ROMs (1024 × 32-bit virtual memory)
On-chip 64
× 32-bit bootstrap ROM
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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