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SST49LF016C-66-4C-NHE Datasheet(PDF) 2 Page - Microchip Technology |
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SST49LF016C-66-4C-NHE Datasheet(HTML) 2 Page - Microchip Technology |
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2 / 43 page  ©2016 DS20005029B 02/16 2 16 Mbit LPC Serial Flash SST49LF016C EOL Data Sheet Product Description The SST49LF016C flash memory device is designed to interface with host controllers (chipsets) that support a low-pin-count (LPC) interface for system firmware applications. Complying with LPC Inter- face Specification 1.1, SST49LF016C supports a Burst-Read data transfer of 15.6 MBytes per second at 33 MHz clock speed and 31.2 MBytes per second at 66 MHz clock speed, up to 128 bytes in a sin- gle operation. The LPC interface operates with 5 signal pins versus 28 pins of a 8-bit parallel flash memory. This frees up pins on the ASIC host controller resulting in lower ASIC costs and a reduction in overall sys- tem costs due to simplified signal routing. This 5-signal LPC interface supports both in-system and rapid factory programming using programmer equipment. A high voltage pin (WP#/AAI) enables Auto Address Increment (AAI) mode. Via the software registers, the SST49LF016C offers hardware block protection and individual block protection for critical system code and data. The 256-bit Security ID space is comprised of a 64-bit fac- tory pre-programmed unique number and a 192-bit One-Time-Programmable (OTP) area. This Secu- rity ID permits the use of new security techniques and implementation of a new data protection scheme. To protect against inadvertent write, the SST49LF016C device has on-chip hardware and software write protection schemes. The SST49LF016C also provides general purpose inputs (GPI) for system design flexibility. Manufactured with SST proprietary, high-performance SuperFlash technology, SST49LF016C has a split-gate cell design and thick-oxide tunneling injector for greater reliability and manufacturability com- pared with alternative technology approaches. The SST49LF016C significantly improves performance and reliability, while lowering power consump- tion. The total energy consumed is a function of the applied voltage, current and time of application. Because the SST49LF016C writes in-system with a single 3.0-3.6V power supply, the total energy consumed during any Erase or Program operation is less than alternative flash memory technologies. The SuperFlash technology provides fixed Erase and Program time, independent of the number of Erase/Program cycles performed. This feature eliminates system software or hardware calibration or erase cycle correlation which is necessary with alternative flash memory technologies, whose Erase and Program time increase with accumulated Erase/Program cycles. The SST49LF016C product provides a maximum program time of 10 µs per byte with a single-byte Program operation; effectively 5 µs per byte with a dual-byte Program operation and 2.5 µs per byte with a quad-byte Program operation. The SST49LF016C is offered in 32-PLCC, 32-TSOP, and 40-TSOP packages. See Figures 3, 4, and 5 for pin assignments and Table 1 for pin descriptions. |
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