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ISO7821LLDW Datasheet(PDF) 11 Page - Texas Instruments |
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ISO7821LLDW Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 33 page  11 ISO7820LL, ISO7821LL www.ti.com SLLSET8A – MARCH 2016 – REVISED AUGUST 2016 Product Folder Links: ISO7820LL ISO7821LL Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) UI is the unit interval. 6.11 Switching Characteristics (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LVDS CHANNEL tPLH tPHL Propagation delay time 17 25 ns PWD Pulse width distortion |tPHL – tPLH| 0 4.5 ns tsk(o) Channel-to-channel output skew time Same directional channels, same voltage and temperature 2.5 ns tsk(pp) Part-part skew Same directional channels, same voltage and temperature 4.5 ns tCMset Common-mode settling time after EN = 0 to EN = 1 transition. Common-mode capacitive load = 100 pF to 0.5 nF 20 µs tfs Default output delay time from input power loss Measured from the time VCC goes below 1.7 V, see Figure 24 0.2 9 µs tie Time interval error, or peak-to-peak jitter 216 – 1 PRBS data at 100 Mbps; RX VID = 350 mVPP, 1 ns trf 10% to 90%, TA = 25°C, VCC1, VCC2 = 3.3 V 1 ns LVDS TX AND RX trf TX differential rise/fall times (20% to 80%) See Figure 22 300 780 1380 ps ∆VOC(pp) TX common-mode voltage peak-to-peak at 100 Mbps 0 150 mVPP tPLZ, tPHZ TX disable time—valid output to HiZ See Figure 23 10 20 ns tPZH Enable propagation delay, high impedance-to-high output See Figure 23 10 20 ns tPZL Enable propagation delay, high impedance-to-low output See Figure 23 2 2.5 μs |VID| Magnitude of RX input differential voltage for valid operation Driven with voltage sources on RX pins, see the figures in the Parameter Measurement Information section 100 600 mV trf(RX) Allowed RX input differential rise and fall times (20% to 80%) See Figure 27 1 0.3 × UI(1) ns |
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