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TPS62130A-Q1, TPS62133A-Q1, TPS6213013A-Q1

www.ti.com

SLVSCC2B – MAY 2014 – REVISED NOVEMBER 2016

Product Folder Links: TPS62130A-Q1 TPS62133A-Q1 TPS6213013A-Q1

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Copyright © 2014–2016, Texas Instruments Incorporated

(1)

Current into AVIN+PVIN pin.

(2)

This is the regulation accuracy of the voltage at the FB pin (adjustable version) and of the output voltage (fixed version).

7.5 Electrical Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT

SUPPLY

Input voltage range

3

17

V

Operating quiescent current

17

30

µA

EN=Low

1.5

25

µA

Undervoltage lockout threshold

Falling Input Voltage (PWM mode operation)

2.6

2.7

2.8

V

Hysteresis

200

mV

Thermal shutdown temperature

160

°C

Thermal shutdown hysteresis

20

CONTROL (EN, DEF, LOG, SS/TR, PG)

High level input threshold voltage (EN,

DEF)

0.9

V

Low level input threshold voltage (EN,

DEF)

0.3

V

Input leakage current (EN, DEF, LOG)

0.01

1

µA

Power good threshold voltage

92%

95%

98%

87%

90%

94%

Power good output low

0.07

0.3

V

Input leakage current (PG)

1

400

nA

SS/TR pin source current

2.3

2.5

2.7

µA

POWER SWITCH

High-side MOSFET ON-resistance

90

170

mΩ

120

Low-side MOSFET ON-resistance

40

70

mΩ

50

High-side MOSFET forward current limit

3.6

4.2

4.9

A

OUTPUT

VREF

Internal reference voltage

0.8

V

Input leakage current (FB)

1

100

nA

Output voltage range (TPS62130A-Q1)

0.9

6.0

V

DEF (Output voltage programming)

DEF=0 (GND)

–1.8%

1.8%

–2.3%

2.8%

Load regulation

0.05

%/A

Line regulation

3V

mode operation

0.02

%/V