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TPS6216x-Q1 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS6216x-Q1 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 34 page L peak(typ) LIMF PD V I I t L = + ´ ( ) IN(min) OUT(min) OUT DS(on) L V V I R R = + + ( ) OUT LPSM(pea IN ON k) V V t L I - ´ = 10 TPS62160-Q1, TPS62162-Q1 SLVSCK6A – DECEMBER 2014 – REVISED NOVEMBER 2016 www.ti.com Product Folder Links: TPS62160-Q1 TPS62162-Q1 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated Device Functional Modes (continued) space The peak inductor current in PSM can be approximated by: space (2) space When VIN decreases to typically 15% above VOUT, the TPS6216x-Q1 does not enter Power Save Mode, regardless of the load current. The device maintains output regulation in PWM mode. 9.4.3 100% Duty-Cycle Operation The duty cycle of the buck converter is given by D = Vout/Vin and increases as the input voltage comes close to the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch 100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal set point. This allows the conversion of small input to output voltage differences, e.g. for longest operation time of battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off. The minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as: space (3) space where IOUT is the output current, RDS(on) is the RDS(on) of the high-side FET and RL is the DC resistance of the inductor used. space 9.4.4 Current Limit and Short Circuit Protection The TPS6216x-Q1 is protected against heavy load and short circuit events. At heavy loads, the current limit determines the maximum output current. If the current limit is reached, the high-side FET will be turned off. Avoiding shoot through current, the low-side FET is then switched on to allow the inductor current to decrease. The high-side FET will turn on again, only if the current in the low-side FET has decreased below the low side current limit threshold. The output current of the device is limited by the current limit (see Electrical Characteristics). Due to internal propagation delay, the actual current can exceed the static current limit during that time. space The dynamic current limit can be calculated as follows: space (4) space where ILIMF is the static current limit, specified in the electrical characteristic table, L is the inductor value, VL is the voltage across the inductor and tPD is the internal propagation delay. |
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