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ISO5852S Datasheet(PDF) 7 Page - Texas Instruments

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Part # ISO5852S
Description  High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ISO5852S Datasheet(HTML) 7 Page - Texas Instruments

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7
ISO5852S-EP
www.ti.com
SLLSEW1 – DECEMBER 2016
Product Folder Links: ISO5852S-EP
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Copyright © 2016, Texas Instruments Incorporated
(1)
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care
should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on
the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases.
Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.
(2)
This coupler is suitable for safe electrical insulation only within the maximum operating ratings. Compliance with the safety ratings shall
be ensured by means of suitable protective circuits.
(3)
Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
(4)
Apparent charge is electrical discharge caused by a partial discharge (pd).
(5)
All pins on each side of the barrier tied together creating a two-terminal device.
7.6 Insulation Specifications
PARAMETER
TEST CONDITIONS
VALUE
UNIT
GENERAL
CLR
External clearance(1)
Shortest terminal-to-terminal distance through air
8
mm
CPG
External creepage(1)
Shortest terminal-to-terminal distance across the
package surface
8
mm
DTI
Distance through the insulation
Minimum internal gap (internal clearance)
21
µm
CTI
Comparative tracking index
DIN EN 60112 (VDE 0303-11); IEC 60112; Material
Group I according to IEC 60664-1; UL 746A
600
V
Material group
I
Overvoltage Category
Rated mains voltage
≤ 600 VRMS
I-IV
Rated mains voltage
≤ 1000 VRMS
I-III
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12(2)
VIORM
Maximum repetitive peak isolation voltage AC voltage (bipolar)
2121
VPK
VIOWM
Maximum isolation working voltage
AC voltage (sine wave) Time dependent dielectric
breakdown (TDDB) test, see Figure 1
1500
VRMS
DC voltage
2121
VDC
VIOTM
Maximum transient isolation voltage
VTEST = VIOTM; t = 60 s (qualification); t = 1 s (100%
production)
8000
VPK
VIOSM
Maximum surge isolation voltage(3)
Test method per IEC 60065, 1.2/50 µs waveform,
VTEST = 1.6 × VIOSM = 12800 VPK (qualification)
8000
VPK
qpd
Apparent charge(4)
Method a: After I/O safety test subgroup 2/3,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.2 × VIORM = 2545 VPK ,
tm = 10 s
≤5
pC
Method a: After environmental tests subgroup 1,
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.6 × VIORM = 3394 VPK ,
tm = 10 s
≤5
Method b1: At routine test (100% production) and
preconditioning (type test)
Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.875× VIORM = 3977 VPK ,
tm = 10 s
≤5
CIO
Barrier capacitance, input to output(5)
VIO = 0.4 sin (2πft), f = 1 MHz
1
pF
RIO
Isolation resistance, input to output(5)
VIO = 500 V, TA = 25°C
> 1012
Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C
> 1011
VIO = 500 V at TS = 150°C
> 109
Pollution degree
2
UL 1577
VISO
Withstand isolation voltage
VTEST = VISO = 5700 VRMS, t = 60 s (qualification);
VTEST = 1.2 × VISO = 6840 VRMS, t = 1 s (100%
production)
5700
VRMS


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