 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
LAN9215I Datasheet(PDF) 86 Page - SMSC Corporation |
|
||||||||||||||||||||||||||||||
LAN9215I Datasheet(HTML) 86 Page - SMSC Corporation |
|
|
86 / 139 page  16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support Datasheet Revision 2.9 (03-01-12) 86 SMSC LAN9215i DATASHEET 5.3.13 PMT_CTRL— Power Management Control Register This register controls the Power Management features. This register can be read while the LAN9215i is in a power saving mode. Note: The LAN9215i must always be read at least once after power-up, reset, or upon return from a power-saving state or write operations will not function. Offset: 84h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31:14 RESERVED RO - 13-12 Power Management Mode (PM_MODE) – These bits set the LAN9215i into the appropriate Power Management mode. Special care must be taken when modifying these bits. Encoding: 00b – D0 (normal operation) 01b – D1 (wake-up frame and magic packet detection are enabled) 10b – D2 (can perform energy detect) 11b – RESERVED - Do not set in this mode Note: When the LAN9215i is in any of the reduced power modes, a write of any data to the BYTE_TEST register will wake-up the device. DO NOT PERFORM WRITES TO OTHER ADDRRESSES while the READY bit in this register is cleared. SC 00b 11 RESERVED RO - 10 PHY Reset (PHY_RST) – Writing a ‘1’ to this bit resets the PHY. The internal logic automatically holds the PHY reset for a minimum of 100us. When the PHY is released from reset, this bit is automatically cleared. All writes to this bit are ignored while this bit is high. SC 0b 9 Wake-On-Lan Enable (WOL_EN) – When set, the PME signal (if enabled with PME_EN) will be asserted in accordance with the PME_IND bit upon a WOL event. When set, the PME_INT will also be asserted upon a WOL event, regardless of the setting of the PME_EN bit. R/W 0b 8 Energy-Detect Enable (ED_EN) - When set, the PME signal (if enabled with PME_EN) will be asserted in accordance with the PME_IND bit upon an Energy-Detect event. When set, the PME_INT will also be asserted upon an Energy Detect event, regardless of the setting of the PME_EN bit. R/W 0b 7 RESERVED RO - 6 PME Buffer Type (PME_TYPE) – When cleared, enables PME to function as an open-drain buffer for use in a Wired-Or configuration. When set, the PME output is a Push-Pull driver. When configured as an open-drain output the PME_POL field is ignored, and the output is always active low. R/W NASR 0b |
Similar Part No. - LAN9215I_12 |
|
Similar Description - LAN9215I_12 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
