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LAN91C111i-NS Datasheet(PDF) 12 Page - Microchip Technology

Part # LAN91C111i-NS
Description  10/100 Non-PCI Ethernet Single Chip MAC PHY
Download  125 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN91C111i-NS Datasheet(HTML) 12 Page - Microchip Technology

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LAN91C111
DS00002276A-page 12
 2011-2016 Microchip Technology Inc.
38
40
Asynchronous
Ready
ARDY
OD16
Open drain output. ARDY may be used
when interfacing asynchronous buses to
extend accesses. Its rising (access
completion) edge is controlled by the
XTAL1 clock and, therefore,
asynchronous to the host CPU or bus
clock. ARDY is negated during
Asynchronous cycle when one of the
following conditions occurs:
No_Wait Bit in the Configuration Register
is cleared.
Read FIFO contains less than 4 bytes
when read.
Write FIFO is full when write.
43
45
nSynchronous
Ready
nSRDY
O16
Output. This output is used when
interfacing synchronous buses and
nVLBUS=0 to extend accesses. This
signal remains normally inactive, and its
falling edge indicates completion. This
signal is synchronous to the bus clock
LCLK.
46
48
nReady Return
nRDYRTN
I**
Input. This input is used to complete
synchronous read cycles. In EISA burst
mode it is sampled on falling LCLK
edges, and synchronous cycles are
delayed until it is sampled high.
29
31
Interrupt
INTR0
O24
Interrupt Output – Active High, it’s used to
interrupt the Host on a status event. Note:
The selection bits used to determined by
the value of INT SEL 1-0 bits in the
Configuration Register are no longer
required and have been set to reserved in
this revision of the FEAST family of
devices.
45
47
nLocal Device
nLDEV
O16
Output. This active low output is asserted
when AEN is low and A4-A15 decode to
the LAN91C111 address programmed
into the high byte of the Base Address
Register. nLDEV is a combinatorial
decode of unlatched address and AEN
signals.
31
33
nRead Strobe
nRD
IS**
Input. Used in asynchronous bus
interfaces.
32
34
nWrite Strobe
nWR
IS**
Input. Used in asynchronous bus
interfaces.
34
36
nData Path
Chip Select
nDATACS
I with
pullup**
Input. When nDATACS is low, the Data
Path can be accessed regardless of the
values of AEN, A1-A15 and the content of
the BANK SELECT Register. nDATACS
provides an interface for bursting to and
from the LAN91C111 32 bits at a time.
9
11
EEPROM Clock
EESK
O4
Output. 4
sec clock used to shift data in
and out of the serial EEPROM.
10
12
EEPROM
Select
EECS
O4
Output. Serial EEPROM chip select.
Used for selection and command framing
of the serial EEPROM.
Pin No.
Name
Symbol
Buffer
Type
Description
TQFP
QFP


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