LAN9117 datasheet(11/114 Pages) MICROCHIP

Part #	LAN9117

Description	High Performance Single-Chip 10/100 Non-PCI Ethernet Controller

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DS00002267A-page 11

LAN9117

95

Reset

nRESET

IS

(PU)

1

Active-low reset input. Resets all logic

and registers within the LAN9117 This

signal is pulled high with a weak

internal pull-up resistor. If nRESET is

left unconnected, the LAN9117 will rely

on its internal power-on reset circuitry

Note:

The LAN9117 must always

be read at least once after

power-up, reset, or upon

return from a power-saving

state or write operations will

not function. See Section

3.11,

"Detailed

Reset

Description," on page 32 for

additional information

70

Wakeup Indicator

PME

O8/OD8

1

When programmed to do so, is

asserted when the LAN9117 detects a

wake event and is requesting the

system to wake up from the associated

sleep state. The polarity and buffer

type of this signal is programmable.

Note:

Detection of a Power Man-

agement Event, and asser-

tion of the PME signal will

not wakeup the LAN9117.

The LAN9117 will only wake

up when it detects a host

write cycle (assertion of

nCS and nWR). Although

any write to the LAN9117,

regardless of the data writ-

ten, will wake-up the device

when it is in a power-saving

mode, it is required that the

BYTE_TEST

register

be

used for this purpose.

71,73,8

4,90,91

Reserved

5

No Connect

74

10/100 Selector

SPEED_SEL

I (PU)

1

This signal functions as a configuration

input on power-up and is used to select

the default Ethernet settings. Upon

deassertion of reset, the value of the

input is latched. This signal functions

as shown in Table 2-2, "Default

Ethernet Settings", below.

TABLE 2-5:

SYSTEM AND POWER SIGNALS (CONTINUED)

Pin No.

Name

Symbol

Buffer

Type

# Pins

Description

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