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T89C51RC2-3CSIL Datasheet(PDF) 6 Page - ATMEL Corporation |
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T89C51RC2-3CSIL Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 9 page 6 Rev. B - 30-Mar-01 Preliminary T89C51RB2/RC2 Table 3. Pin Description for 40/44 pin packages Mnemonic Pin Number Type Name and Function DIL LCC VQFP44 1.4 VSS 20 22 16 I Ground: 0V reference VCC 40 44 38 I Power Supply: This is the power supply voltage for normal, idle and power-down operation P0.0-P0.7 39-32 43-36 37-30 I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them float and can be used as high impedance inputs. Port 0 must be polarized to VCC or VSS in order to prevent any parasitic current consumption. Port 0 is also the multiplexed low-order address and data bus during access to external program and data memory. In this application, it uses strong internal pull-up when emitting 1s. Port 0 also inputs the code bytes during FLASH programming. External pull-ups are required during program verification during which P0 outputs the code bytes. P1.0-P1.7 1-8 2-9 40-44 1-3 I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally pulled low will source current because of the internal pull- ups. Port 1 also receives the low-order address byte during memory programming and verification. Alternate functions for T89C51RB2/RC2 Port 1 include: 12 40 I/O P1.0 : Input / Output I/O T2 (P1.0): Timer/Counter 2 external count input/Clockout 23 41 I/O P1.1 : Input / Output I T2EX : Timer/Counter 2 Reload/Capture/Direction Control I SS : SPI Slave Select 34 42 I/O P1.2 : Input / Output I ECI : External Clock for the PCA 45 43 I/O P1.3: Input / Output I/O CEX0 : Capture/Compare External I/O for PCA module 0 56 44 I/O P1.4 : Input / Output I/O CEX1 : Capture/Compare External I/O for PCA module 1 67 1 I/O P1.5 : Input / Output I/O CEX2 : Capture/Compare External I/O for PCA module 2 I/O MISO : SPI Master Input Slave Output line When SPI is is in master mode , MISO receives data from the slave peripheral. When SPI is in slave mode , MISO outputs data to the master controller. 78 2 I/O P1.6 : Input / Output I/O CEX3 : Capture/Compare External I/O for PCA module 3 I/O SCK : SPI Serial Clock SCK outputs clock to the slave peripheral 89 3 I/O P1.7 : Input / Output: I/O CEX4 : Capture/Compare External I/O for PCA module 4 I/O MOSI : SPI Master Output Slave Input line When SPI is is in master mode , MOSI outputs data to the slave peripheral. When SPI is in slave mode , MOSI receives data from the master controller. XTAL1 19 21 15 I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. XTAL2 18 20 14 O Crystal 2: Output from the inverting oscillator amplifier |
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