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## 84330CI Datasheet(PDF) 13 Page - Integrated Device Technology

 Part No. 84330CI Description 720MHz, Low Jitter, Crystal-to-LVPECL Frequency Synthesizer Download 20 Pages Scroll/Zoom 100% Manufacturer IDT [Integrated Device Technology] Direct Link http://www.idt.com Logo

## 84330CI Datasheet(HTML) 13 Page - Integrated Device Technology

 13 / 20 page13©2016 Integrated Device Technology, IncRevision A January 13, 201684330CI Data SheetPower ConsiderationsThis section provides information on power dissipation and junction temperature for the 84330CI.Equations and example calculations are also provided.1.Power Dissipation.The total power dissipation for the 84330CI is the sum of the core power plus the power dissipated in the load(s).The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.•Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 17mA = 58.9mW•Power (outputs)MAX = 30mW/Loaded Output PairTotal Power_MAX (3.465V, with all outputs switching) = 58.9mW + 30mW = 88.9mW2. Junction Temperature.Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. Themaximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bondwire and bond pad temperature remains below 125°C.The equation for Tj is as follows: Tj =JA * Pd_total + TATj = Junction TemperatureJA = Junction-to-Ambient Thermal ResistancePd_total = Total Device Power Dissipation (example calculation is in section 1 above)TA = Ambient TemperatureIn order to calculate junction temperature, the appropriate junction-to-ambient thermal resistanceJA must be used. Assuming a moderate airflow of 200 linear feet per minute and a multi-layer board, the appropriate value is 31.1°C/W per Table 8A below.Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:85°C + 0.89W * 31.1°C/W = 112.7°C. This is below the limit of 125°C.This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type ofboard (multi-layer).Table 8A. Thermal Resistance JA for 28 Lead PLCC, Forced ConvectionTable 8B. Thermal Resistance JA for 32 Lead LQFP, Forced ConvectionJA by VelocityLinear Feet per Minute0200500Multi-Layer PCB, JEDEC Standard Test Boards37.8°C/W31.1°C/W28.3°C/WJA by VelocityLinear Feet per Minute0200500Single-Layer PCB, JEDEC Standard Test Boards67.8°C/W55.9°C/W50.1°C/WMulti-Layer PCB, JEDEC Standard Test Boards47.9°C/W42.1°C/W39.4°C/WNOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.