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SST39VF3201C Datasheet(PDF) 1 Page - Microchip Technology |
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SST39VF3201C Datasheet(HTML) 1 Page - Microchip Technology |
1 / 37 page ©2014 Silicon Storage Technology, Inc. DS20005020B 07/14 Data Sheet www.microchip.com 32 Mbit (x16) Multi-Purpose Flash Plus SST39VF3201C / SST39VF3202C Features • Organized as 2M x16 • Single Voltage Read and Write Operations – 2.7-3.6V • Superior Reliability – Endurance: 100,000 Cycles (Typical) – Greater than 100 years Data Retention • Low Power Consumption (typical values at 5 MHz) – Active Current: 6 mA (typical) – Standby Current: 4 µA (typical) – Auto Low Power Mode: 4 µA (typical) • Hardware Block-Protection/WP# Input Pin – Top Block-Protection (top two 4-KWord blocks) for SST39VF3202C – Bottom Block-Protection (bottom two 4-KWord blocks) for SST39VF3201C • Sector-Erase Capability – Uniform 2 KWord sectors • Block-Erase Capability – Flexible block architecture – Eight 4-KWord blocks, 63 32-KWord blocks • Chip-Erase Capability • Erase-Suspend/Erase-Resume Capabilities • Hardware Reset Pin (RST#) • Security-ID Feature – Microchip: 128 bits; User: 128 words • Fast Read Access Time: –70 ns • Latched Address and Data • Fast Erase and Word-Program: – Sector-Erase Time: 18 ms (typical) – Block-Erase Time: 18 ms (typical) – Chip-Erase Time: 35 ms (typical) – Word-Program Time: 7 µs (typical) • Automatic Write Timing – Internal VPP Generation • End-of-Write Detection – Toggle Bits – Data# Polling – RY/BY# Pin • CMOS I/O Compatibility • JEDEC Standard – Flash EEPROM Pin Assignments • Packages Available – 48-lead TSOP (12mm x 20mm) – 48-ball TFBGA (6mm x 8mm) • All devices are RoHS compliant The SST39VF3201C and SST39VF3202C devices are 2M x16, CMOS Multi-Pur- pose Flash Plus (MPF+) manufactured with proprietary, high performance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injec- tor attain better reliability and manufacturability compared with alternate approaches. The SST39VF3201C and SST39VF3202C write (Program or Erase) with a 2.7-3.6V power supply. This device conforms to JEDEC standard pinouts for x16 memories. |
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