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HY57V653220BTC Datasheet(PDF) 1 Page - Hynix Semiconductor |
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HY57V653220BTC Datasheet(HTML) 1 Page - Hynix Semiconductor |
1 / 12 page HY57V653220B 4 Banks x 512K x 32Bit Synchronous DRAM This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.1.6/Dec. 01 1 DESCRIPTION The Hynix HY57V653220B is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the memory applications which require wide data I/O and high bandwidth. HY57V653220B is organized as 4banks of 524,288x32. HY57V653220B is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and out- puts are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL. Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.) FEATURES • JEDEC standard 3.3V power supply • All device pins are compatible with LVTTL interface • JEDEC standard 400mil 86pin TSOP-II with 0.5mm of pin pitch • All inputs and outputs referenced to positive edge of system clock • Data mask function by DQM0,1,2 and 3 • Internal four banks operation • Auto refresh and self refresh • 4096 refresh cycles / 64ms • Programmable Burst Length and Burst Type - 1, 2, 4, 8 or full page for Sequential Burst - 1, 2, 4 or 8 for Interleave Burst • Programmable CAS Latency ; 2, 3 Clocks • Burst Read Single Write operation ORDERING INFORMATION Part No. Clock Frequency Power Organization Interface Package HY57V653220BTC-5 200MHz Normal 4Banks x 512Kbits x32 LVTTL 400mil 86pin TSOP II HY57V653220BTC-55 183MHz HY57V653220BTC-6 166MHz HY57V653220BTC-7 143MHz HY57V653220BTC-8 125MHz HY57V653220BTC-10P 100MHz HY57V653220BTC-10 100MHz |
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